Start to populate TVP7002 connections

ATMEGA32U4.sch

@@ -39,6 +39,8 @@ LIBS:is61c1024al
 LIBS:tinkerforge
 LIBS:74lvc244
 LIBS:is61lv5128al
+LIBS:w_connectors
+LIBS:vga
 LIBS:Rasky_v1-cache
 EELAYER 25 0
 EELAYER END

FPGA.sch

@@ -39,6 +39,8 @@ LIBS:is61c1024al
 LIBS:tinkerforge
 LIBS:74lvc244
 LIBS:is61lv5128al
+LIBS:w_connectors
+LIBS:vga
 LIBS:Rasky_v1-cache
 EELAYER 25 0
 EELAYER END

IO.sch

@@ -39,6 +39,8 @@ LIBS:is61c1024al
 LIBS:tinkerforge
 LIBS:74lvc244
 LIBS:is61lv5128al
+LIBS:w_connectors
+LIBS:vga
 LIBS:Rasky_v1-cache
 EELAYER 25 0
 EELAYER END

Rasky_v1-cache.lib

 EESchema-LIBRARY Version 2.3
 #encoding utf-8
 #
+# +1V8
+#
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+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+1V8" 0 140 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
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+P 2 0 1 0  0 0  0 100 N
+P 2 0 1 0  0 100  30 50 N
+X +1V8 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
 # +3V3
 #
 DEF +3V3 #PWR 0 0 Y Y 1 F P
@@ -603,84 +618,60 @@ X shield 6 400 100 150 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# VGAM
+# VGA
 #
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-F0 "X" -150 550 50 H V L BNN
-F1 "VGAM" -150 -750 50 H V L BNN
-F2 "HD15_B-HD15M" 0 150 50 H I C CNN
+DEF VGA J 0 0 Y N 1 F N
+F0 "J" -250 800 60 H V C CNN
+F1 "VGA" 0 -750 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
 F3 "" 0 0 60 H V C CNN
 DRAW
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+P 2 0 1 0  200 450  300 450 N
+P 3 0 1 0  -300 450  -200 450  -200 450 N
+P 5 0 1 0  -300 -650  -300 700  300 550  300 -550  -300 -650 N
+X RED 1 -600 -350 300 R 50 50 1 1 I
+X GREEN 2 -600 -150 300 R 50 50 1 1 I
+X BLUE 3 -600 50 300 R 50 50 1 1 I
+X ID2/RES 4 -600 250 300 R 50 50 1 1 I
+X GND_HSYNC 5 -600 450 300 R 50 50 1 1 I
+X RED_RTN 6 -600 -450 300 R 50 50 1 1 I
+X GREEN_RTN 7 -600 -250 300 R 50 50 1 1 I
+X BLUE_RTN 8 -600 -50 300 R 50 50 1 1 I
+X KEY/PWR 9 -600 150 300 R 50 50 1 1 I
+X GND_VSYNC 10 -600 350 300 R 50 50 1 1 I
+X ID0/RES 11 600 -350 300 L 50 50 1 1 I
+X ID1/SDA 12 600 -150 300 L 50 50 1 1 I
+X HSYNC 13 600 50 300 L 50 50 1 1 I
+X VSYNC 14 600 250 300 L 50 50 1 1 I
+X ID3/SCL 15 600 450 300 L 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #

Rasky_v1.pro

-update=Wed 02 Sep 2015 03:23:01 AM CEST
+update=Wed 02 Sep 2015 04:41:30 PM CEST
 version=1
 last_client=kicad
 [cvpcb]
@@ -99,3 +99,5 @@ LibName37=/home/nextime/kicad/libs/oshec/is61c1024al
 LibName38=/home/nextime/kicad/libs/thinkerforce/tinkerforge
 LibName39=74lvc244
 LibName40=is61lv5128al
+LibName41=/home/nextime/kicad/libs/smisioto/library/w_connectors
+LibName42=/home/nextime/kicad/libs/qihw/components/vga

Rasky_v1.sch

@@ -39,6 +39,8 @@ LIBS:is61c1024al
 LIBS:tinkerforge
 LIBS:74lvc244
 LIBS:is61lv5128al
+LIBS:w_connectors
+LIBS:vga
 LIBS:Rasky_v1-cache
 EELAYER 25 0
 EELAYER END
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 U 55CF4C76
 F0 "TVP7002" 60
 F1 "TVP7002.sch" 60
+F2 "TVP_PWDOWN" I R 2350 2250 60 
+F3 "TVP_RESET" I R 2350 2350 60 
+F4 "TVP_I2C" B R 2350 2450 60 
 $EndSheet
 $Sheet
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@@ -152,12 +157,12 @@ $EndComp
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 L +3.3V #PWR2
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-F 1 "+3.3V" H 4500 2040 50  0000 C CNN
-F 2 "" H 4500 1900 60  0000 C CNN
-F 3 "" H 4500 1900 60  0000 C CNN
-	1    4500 1900
+P 4000 1900
+F 0 "#PWR2" H 4000 1750 50  0001 C CNN
+F 1 "+3.3V" H 4000 2040 50  0000 C CNN
+F 2 "" H 4000 1900 60  0000 C CNN
+F 3 "" H 4000 1900 60  0000 C CNN
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 	1    0    0    -1  
 $EndComp
 $Comp
@@ -572,6 +577,147 @@ F 3 "" H 10100 5850 60  0000 C CNN
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+Text Label 9900 5000 0    60   ~ 0
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+Text Label 9900 5100 0    60   ~ 0
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 Wire Wire Line
@@ -595,7 +741,7 @@ Wire Wire Line
 Wire Wire Line
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 Wire Wire Line
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+	4000 1950 4950 1950
 Wire Wire Line
 	7150 950  7150 1250
 Connection ~ 7150 1150
@@ -608,7 +754,7 @@ Wire Wire Line
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 Connection ~ 7650 2750
 Wire Wire Line
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+	4000 1950 4000 1900
 Wire Wire Line
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 Wire Wire Line
@@ -808,58 +954,10 @@ Connection ~ 8900 4700
 Wire Wire Line
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 Connection ~ 8400 5600
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-F 3 "" H 8400 5350 60  0000 C CNN
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 $EndSCHEMATC

SRAM.sch

@@ -39,6 +39,8 @@ LIBS:is61c1024al
 LIBS:tinkerforge
 LIBS:74lvc244
 LIBS:is61lv5128al
+LIBS:w_connectors
+LIBS:vga
 LIBS:Rasky_v1-cache
 EELAYER 25 0
 EELAYER END