Commit a64d58e7 authored by Mike Lyons's avatar Mike Lyons

Merging xps_proj into master branch

parents 7d13bfe3 46a3a306
Net Reset LOC=N4 | IOSTANDARD=LVCMOS18;
Net SysClk LOC=L15 | IOSTANDARD=LVCMOS33;
# SPI Port
Net spi_miso LOC=U16 | IOSTANDARD=LVCMOS33;
Net spi_mosi LOC=U15 | IOSTANDARD=LVCMOS33;
Net spi_clk LOC=R10 | IOSTANDARD=LVCMOS33;
Net spi_ss LOC=M11 | IOSTANDARD=LVCMOS33;
# LEDs
Net leds<0> LOC=U18 | IOSTANDARD=LVCMOS33;
Net leds<1> LOC=M14 | IOSTANDARD=LVCMOS33;
Net leds<2> LOC=N14 | IOSTANDARD=LVCMOS33;
Net leds<3> LOC=L14 | IOSTANDARD=LVCMOS33;
Net leds<4> LOC=M13 | IOSTANDARD=LVCMOS33;
Net leds<5> LOC=D4 | IOSTANDARD=LVCMOS33;
Net leds<6> LOC=P16 | IOSTANDARD=LVCMOS33;
Net leds<7> LOC=N12 | IOSTANDARD=LVCMOS33;
Net Reset LOC=N4 | IOSTANDARD=LVCMOS18;
Net SysClk LOC=L15 | IOSTANDARD=LVCMOS33;
# SPI Port
Net spi_miso LOC=U16 | IOSTANDARD=LVCMOS33;
Net spi_mosi LOC=U15 | IOSTANDARD=LVCMOS33;
Net spi_clk LOC=R10 | IOSTANDARD=LVCMOS33;
Net spi_ss LOC=M11 | IOSTANDARD=LVCMOS33;
# LEDs
Net leds<0> LOC=U18 | IOSTANDARD=LVCMOS33;
Net leds<1> LOC=M14 | IOSTANDARD=LVCMOS33;
Net leds<2> LOC=N14 | IOSTANDARD=LVCMOS33;
Net leds<3> LOC=L14 | IOSTANDARD=LVCMOS33;
Net leds<4> LOC=M13 | IOSTANDARD=LVCMOS33;
Net leds<5> LOC=D4 | IOSTANDARD=LVCMOS33;
Net leds<6> LOC=P16 | IOSTANDARD=LVCMOS33;
Net leds<7> LOC=N12 | IOSTANDARD=LVCMOS33;
system.log
psf2Edward.log
This source diff could not be displayed because it is too large. You can view the blob instead.
// BMM LOC annotation file.
//
// Release 13.2 - Data2MEM O.61xd, build 2.2 May 20, 2011
// Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved.
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0', ID 100, memory map.
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_MAP microblaze_0 MICROBLAZE 100
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0' address space 'lmb_bram_combined' 0x00000000:0x0000FFFF (64 KBytes).
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_SPACE lmb_bram_combined RAMB16 [0x00000000:0x0000FFFF]
BUS_BLOCK
lmb_bram/lmb_bram/ramb16bwer_0 [31:31] INPUT = lmb_bram_combined_0.mem PLACED = X3Y24;
lmb_bram/lmb_bram/ramb16bwer_1 [30:30] INPUT = lmb_bram_combined_1.mem PLACED = X2Y26;
lmb_bram/lmb_bram/ramb16bwer_2 [29:29] INPUT = lmb_bram_combined_2.mem PLACED = X3Y26;
lmb_bram/lmb_bram/ramb16bwer_3 [28:28] INPUT = lmb_bram_combined_3.mem PLACED = X3Y22;
lmb_bram/lmb_bram/ramb16bwer_4 [27:27] INPUT = lmb_bram_combined_4.mem PLACED = X3Y30;
lmb_bram/lmb_bram/ramb16bwer_5 [26:26] INPUT = lmb_bram_combined_5.mem PLACED = X2Y28;
lmb_bram/lmb_bram/ramb16bwer_6 [25:25] INPUT = lmb_bram_combined_6.mem PLACED = X2Y30;
lmb_bram/lmb_bram/ramb16bwer_7 [24:24] INPUT = lmb_bram_combined_7.mem PLACED = X3Y32;
lmb_bram/lmb_bram/ramb16bwer_8 [23:23] INPUT = lmb_bram_combined_8.mem PLACED = X1Y34;
lmb_bram/lmb_bram/ramb16bwer_9 [22:22] INPUT = lmb_bram_combined_9.mem PLACED = X2Y52;
lmb_bram/lmb_bram/ramb16bwer_10 [21:21] INPUT = lmb_bram_combined_10.mem PLACED = X2Y50;
lmb_bram/lmb_bram/ramb16bwer_11 [20:20] INPUT = lmb_bram_combined_11.mem PLACED = X2Y48;
lmb_bram/lmb_bram/ramb16bwer_12 [19:19] INPUT = lmb_bram_combined_12.mem PLACED = X2Y46;
lmb_bram/lmb_bram/ramb16bwer_13 [18:18] INPUT = lmb_bram_combined_13.mem PLACED = X2Y32;
lmb_bram/lmb_bram/ramb16bwer_14 [17:17] INPUT = lmb_bram_combined_14.mem PLACED = X1Y30;
lmb_bram/lmb_bram/ramb16bwer_15 [16:16] INPUT = lmb_bram_combined_15.mem PLACED = X1Y32;
lmb_bram/lmb_bram/ramb16bwer_16 [15:15] INPUT = lmb_bram_combined_16.mem PLACED = X2Y18;
lmb_bram/lmb_bram/ramb16bwer_17 [14:14] INPUT = lmb_bram_combined_17.mem PLACED = X2Y20;
lmb_bram/lmb_bram/ramb16bwer_18 [13:13] INPUT = lmb_bram_combined_18.mem PLACED = X2Y14;
lmb_bram/lmb_bram/ramb16bwer_19 [12:12] INPUT = lmb_bram_combined_19.mem PLACED = X2Y16;
lmb_bram/lmb_bram/ramb16bwer_20 [11:11] INPUT = lmb_bram_combined_20.mem PLACED = X2Y44;
lmb_bram/lmb_bram/ramb16bwer_21 [10:10] INPUT = lmb_bram_combined_21.mem PLACED = X2Y42;
lmb_bram/lmb_bram/ramb16bwer_22 [9:9] INPUT = lmb_bram_combined_22.mem PLACED = X2Y38;
lmb_bram/lmb_bram/ramb16bwer_23 [8:8] INPUT = lmb_bram_combined_23.mem PLACED = X2Y40;
lmb_bram/lmb_bram/ramb16bwer_24 [7:7] INPUT = lmb_bram_combined_24.mem PLACED = X2Y24;
lmb_bram/lmb_bram/ramb16bwer_25 [6:6] INPUT = lmb_bram_combined_25.mem PLACED = X1Y28;
lmb_bram/lmb_bram/ramb16bwer_26 [5:5] INPUT = lmb_bram_combined_26.mem PLACED = X2Y22;
lmb_bram/lmb_bram/ramb16bwer_27 [4:4] INPUT = lmb_bram_combined_27.mem PLACED = X3Y28;
lmb_bram/lmb_bram/ramb16bwer_28 [3:3] INPUT = lmb_bram_combined_28.mem PLACED = X3Y34;
lmb_bram/lmb_bram/ramb16bwer_29 [2:2] INPUT = lmb_bram_combined_29.mem PLACED = X3Y36;
lmb_bram/lmb_bram/ramb16bwer_30 [1:1] INPUT = lmb_bram_combined_30.mem PLACED = X2Y34;
lmb_bram/lmb_bram/ramb16bwer_31 [0:0] INPUT = lmb_bram_combined_31.mem PLACED = X2Y36;
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;
This diff is collapsed.
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>demo</name>
<comment></comment>
<projects>
<project>standalone_bsp_0</project>
<project>demobsp</project>
</projects>
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<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
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<key>?name?</key>
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<nature>org.eclipse.cdt.core.ccnature</nature>
</natures>
</projectDescription>
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
-include ../makefile.init
RM := rm -rf
# All of the sources participating in the build are defined here
-include sources.mk
-include subdir.mk
-include src/subdir.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
ifneq ($(strip $(CC_DEPS)),)
-include $(CC_DEPS)
endif
ifneq ($(strip $(CPP_DEPS)),)
-include $(CPP_DEPS)
endif
ifneq ($(strip $(CXX_DEPS)),)
-include $(CXX_DEPS)
endif
ifneq ($(strip $(C_UPPER_DEPS)),)
-include $(C_UPPER_DEPS)
endif
ifneq ($(strip $(S_UPPER_DEPS)),)
-include $(S_UPPER_DEPS)
endif
endif
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
ELFSIZE += \
demo.elf.size \
ELFCHECK += \
demo.elf.elfcheck \
# All Target
all: demo.elf secondary-outputs
# Tool invocations
demo.elf: $(OBJS) $(USER_OBJS)
@echo Building target: $@
@echo Invoking: MicroBlaze g++ linker
mb-g++ -L../../standalone_bsp_0/microblaze_0/lib -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.20.a -mno-xl-soft-mul -o"demo.elf" $(OBJS) $(USER_OBJS) $(LIBS)
@echo Finished building target: $@
@echo ' '
demo.elf.size: demo.elf
@echo Invoking: MicroBlaze Print Size
mb-size demo.elf |tee "demo.elf.size"
@echo Finished building: $@
@echo ' '
demo.elf.elfcheck: demo.elf
@echo Invoking: Xilinx ELF Check
elfcheck demo.elf -hw ../../xps_hw_platform/system.xml -pe microblaze_0 |tee "demo.elf.elfcheck"
@echo Finished building: $@
@echo ' '
# Other Targets
clean:
-$(RM) $(OBJS)$(C_DEPS)$(CC_DEPS)$(CPP_DEPS)$(EXECUTABLES)$(ELFSIZE)$(CXX_DEPS)$(C_UPPER_DEPS)$(ELFCHECK)$(S_UPPER_DEPS) demo.elf
-@echo ' '
secondary-outputs: $(ELFSIZE) $(ELFCHECK)
.PHONY: all clean dependents
.SECONDARY:
-include ../makefile.targets
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
USER_OBJS :=
LIBS :=
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
O_SRCS :=
CPP_SRCS :=
C_UPPER_SRCS :=
C_SRCS :=
LD_SRCS :=
S_UPPER_SRCS :=
S_SRCS :=
OBJ_SRCS :=
CXX_SRCS :=
CC_SRCS :=
OBJS :=
C_DEPS :=
CC_DEPS :=
CPP_DEPS :=
EXECUTABLES :=
ELFSIZE :=
CXX_DEPS :=
C_UPPER_DEPS :=
ELFCHECK :=
S_UPPER_DEPS :=
# Every subdirectory with source files must be described here
SUBDIRS := \
src \
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
CC_SRCS += \
../src/main.cc
OBJS += \
./src/main.o
CC_DEPS += \
./src/main.d
# Each subdirectory must supply rules for building sources it contributes
src/%.o: ../src/%.cc
@echo Building file: $<
@echo Invoking: MicroBlaze g++ compiler
mb-g++ -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.20.a -mno-xl-soft-mul -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -o"$@" "$<"
@echo Finished building: $<
@echo ' '
/*
* Empty C++ Application
*/
#include <stdio.h>
#include "xil_types.h"
#include "xparameters.h"
#include "xdmacentral.h"
#define DMA_DEVICE_ID XPAR_DMACENTRAL_0_DEVICE_ID
#define DMA_BUFFER_BYTE_SIZE 4096
static XDmaCentral Dma;
u32 * pSpiifcBase = (u32 *)0x85000000;
u32 * pMosiBase = (u32 *)0x85010000;
u32 * pMisoBase = (u32 *)0x85011000;
//
// Initializes DMA controller
//
int InitDma();
//
// Copies a block of data between two burst-mode enabled memory regions. Uses
// XPS Central DMA controller. Function spins while waiting for copy to complete.
//
int DmaCopy(void * pSrc, void * pDest, size_t byteCount);
//
// Writes to the three memmap regions in the Spiifc peripheral
// (regs, mosi/miso buffers). Verifies the writes stuck using a read.
//
void SpiifcPioTest();
//
// DMA copies from mosi to miso buffers and verifies result using PIO.
//
void SpiifcDmaTest();
//
// InitDma - Initializes DMA controller
//
int InitDma()
{
XDmaCentral_Config *pDmaCfg;
int status;
// Configure DMA controller
pDmaCfg = XDmaCentral_LookupConfig(DMA_DEVICE_ID);
if (NULL == pDmaCfg) { return XST_FAILURE; }
status = XDmaCentral_CfgInitialize(&Dma, pDmaCfg, pDmaCfg->BaseAddress);
if (XST_SUCCESS != status) { return status; }
// Reset DMAC
XDmaCentral_Reset(&Dma);
// Setup DMAC control register to increment src & dest addr
XDmaCentral_SetControl(
&Dma,
XDMC_DMACR_SOURCE_INCR_MASK | XDMC_DMACR_DEST_INCR_MASK);
// DMAC does not raise interrupts (when transfer completes)
XDmaCentral_InterruptEnableSet(&Dma, 0);
return XST_SUCCESS;
}
int DmaCopy(void * pSrc, void * pDest, size_t byteCount)
{
u32 regValue;
XDmaCentral_Transfer(&Dma, pSrc, pDest, byteCount);
do { // Wait for DMA transfer to complete
regValue = XDmaCentral_GetStatus(&Dma);
} while ((regValue & XDMC_DMASR_BUSY_MASK) == XDMC_DMASR_BUSY_MASK);
if (regValue & XDMC_DMASR_BUS_ERROR_MASK) {
xil_printf("DMA_BUS_ERROR\n");
return XST_FAILURE;
}
return XST_SUCCESS;
}
int main()
{
int status, i;
// Initialize system
if (XST_SUCCESS != (status = InitDma())) {
xil_printf("[FAIL] InitDma() failed. Exiting.\n");
return status;
}
// Perform Programmed IO tests
SpiifcPioTest();
// Test DMA
SpiifcDmaTest();
// Spiifc loopback: anything sent to spiifc is sent back
while (1) {
// //
// // Print values of all SPI registers
// //
// for (i = 0; i < 16; i++) {
// xil_printf("Reg%d=0x%08x\n", i, pSpiifcBase[i]);
// }
// Wait for M->S transfer to complete
//xil_printf("Waiting for M->S transfer to complete..\n");
while(0 == (pSpiifcBase[0] & 0x1)) { ; }
pSpiifcBase[0] &= (~0x1); // Handling MOSI transfer completion
// Initiating DMA transfer
//xil_printf("DMA MOSI buffer to MISO buffer\n");
DmaCopy(pMosiBase, pMisoBase, 4096);
// DMA done, set flag for master
//xil_printf("DMA completed\n");
pSpiifcBase[0] |= 0x2;
}
/*
int i = 0;
for (i = 0; i < 40000000; i++) { ; }
for (i = 0; i < 1024; i++) {
xil_printf("pMOSI[i] = 0x%08X\n", pMosiBase[i]);
}
*/
}
void SpiifcPioTest()
{
int i = 0;
xil_printf("Testing Spiifc PIO...\n");
// PIO Write to Spiifc memmap regions
pSpiifcBase[0] = 0x87654321;
pMosiBase[0] = 0x12345678;
pMisoBase[0] = 0xFEEDFACE;
pMisoBase[1] = 0xBEEFBABE;
pMisoBase[2] = 0xBEEFBEEF;
xil_printf("Reg0 @ 0x%08X: verifying PIO... ", pSpiifcBase);
if (0x87654321 == *pSpiifcBase) {
xil_printf("[PASS]\n");
} else {
xil_printf("[FAIL] (actual=0x%08X)\n", *pSpiifcBase);
}
xil_printf("MOSI @ 0x%08X: verifying PIO... ", pMosiBase);
if (0x12345678 == *pMosiBase) {
xil_printf("[PASS]\n");
} else {
xil_printf("[FAIL] (actual=0x%08X)\n", *pMosiBase);
}
xil_printf("MISO @ 0x%08X: verifying PIO... ", pMisoBase);
if (0xFEEDFACE == *pMisoBase) {
xil_printf("[PASS]\n");
} else {
xil_printf("[FAIL] (actual=0x%08X)\n", *pMisoBase);
}
for (i = 0; i < 16; i++) {
pSpiifcBase[i] = (i << 24) | (i << 16) | (i << 8) | i;
}
for (i = 0; i < 16; i++) {
xil_printf("Reg%d=0x%08x\n", i, pSpiifcBase[i]);
}
xil_printf("\n");
}
void SpiifcDmaTest()
{
int status;
u32 i;
// Pattern DMA memory buffer
for(i = 0; i < DMA_BUFFER_BYTE_SIZE/4; i++) {
pMosiBase[i] = ((i*4+3) & 0xFF) << 24 |
((i*4+2) & 0xFF) << 16 |
((i*4+1) & 0xFF) << 8 |
((i*4+0) & 0xFF);
//pMosiBase[i] = 0xAABBCCDD;
//xil_printf("0x%08X\n", pMosiBase[i]);
}
// DMA buffer to Spiifc.MISO buffer
if (XST_SUCCESS != (status =
DmaCopy(pMosiBase, pMisoBase, DMA_BUFFER_BYTE_SIZE))) {
xil_printf("[FAIL] DmaCopy() failed. Exiting.\n");
}
// Check DMAC copied Spiifc.MOSI --> Spiifc.MISO buffer
u32 expectedDmaWord = 0;
int failWords = 0;
for (i = 0; i < (DMA_BUFFER_BYTE_SIZE/4); i++) {
expectedDmaWord = ((i*4+3) & 0xFF) << 24 |
((i*4+2) & 0xFF) << 16 |
((i*4+1) & 0xFF) << 8 |
((i*4+0) & 0xFF) << 0;
if (pMisoBase[i] != expectedDmaWord) {
xil_printf(
"[FAIL] DMA mem word [i]: expected=0x%08X, actual=0x%08X\n",
expectedDmaWord, pMisoBase[i]);
}
}
if (0 == failWords) {
xil_printf("[PASS] DMA transfer from MOSI to MISO memory\n");
}
}
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<?fileVersion 4.0.0?>
<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
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<extensions/>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration>
</storageModule>
</cproject>
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>standalone_bsp_0</name>
<comment></comment>
<projects>
<project>xps_hw_platform</project>
</projects>
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THIRPARTY=false
PROCESSOR=microblaze_0
MSS_FILE=system.mss
# Makefile generated by Xilinx SDK.
-include libgen.options
LIBRARIES = ${PROCESSOR}/lib/libxil.a
MSS = system.mss
all: libs
@echo 'Finished building libraries'
libs: $(LIBRARIES)
$(LIBRARIES): $(MSS)
libgen -hw ${HWSPEC}\
${REPOSITORIES}\
-pe ${PROCESSOR} \
-log libgen.log \
$(MSS)
clean:
rm -rf ${PROCESSOR}
Release 13.2 - libgen Xilinx EDK 13.2 Build EDK_O.61xd
(nt64)
Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
Command Line: libgen -hw ../xps_hw_platform/system.xml -pe microblaze_0 -log
libgen.log system.mss
Staging source files.
Running DRCs.
Running generate.
Running post_generate.
Running include - 'make -s include "COMPILER=mb-gcc" "ARCHIVER=mb-ar"
"COMPILER_FLAGS=-mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare
-mcpu=v8.20.a -O2 -c" "EXTRA_COMPILER_FLAGS=-g"'.
Running libs - 'make -s libs "COMPILER=mb-gcc" "ARCHIVER=mb-ar"
"COMPILER_FLAGS=-mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare
-mcpu=v8.20.a -O2 -c" "EXTRA_COMPILER_FLAGS=-g"'.
Running execs_generate.
PROCESSOR=microblaze_0
REPOSITORIES=
HWSPEC=../xps_hw_platform/system.xml
PARAMETER VERSION = 2.2.0
BEGIN OS
PARAMETER OS_NAME = standalone
PARAMETER OS_VER = 3.01.a
PARAMETER PROC_INSTANCE = microblaze_0
PARAMETER STDIN = mdm_0
PARAMETER STDOUT = mdm_0
END
BEGIN PROCESSOR
PARAMETER DRIVER_NAME = cpu
PARAMETER DRIVER_VER = 1.13.a
PARAMETER HW_INSTANCE = microblaze_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = gpio
PARAMETER DRIVER_VER = 3.00.a
PARAMETER HW_INSTANCE = DIP_Switches_8Bits
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = gpio
PARAMETER DRIVER_VER = 3.00.a
PARAMETER HW_INSTANCE = LEDs_8Bits
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = gpio
PARAMETER DRIVER_VER = 3.00.a
PARAMETER HW_INSTANCE = Push_Buttons_5Bits
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = bram
PARAMETER DRIVER_VER = 3.00.a
PARAMETER HW_INSTANCE = dlmb_cntlr
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = bram
PARAMETER DRIVER_VER = 3.00.a
PARAMETER HW_INSTANCE = ilmb_cntlr
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = uartlite
PARAMETER DRIVER_VER = 2.00.a
PARAMETER HW_INSTANCE = mdm_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = spiifc_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = dmacentral
PARAMETER DRIVER_VER = 2.00.a
PARAMETER HW_INSTANCE = xps_central_dma_0
END
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>xps_hw_platform</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
</buildSpec>
<natures>
<nature>com.xilinx.sdk.hw.HwProject</nature>
</natures>
</projectDescription>
This diff is collapsed.
// BMM LOC annotation file.
//
// Release 13.2 - Data2MEM O.61xd, build 2.2 May 20, 2011
// Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved.
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0', ID 100, memory map.
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_MAP microblaze_0 MICROBLAZE 100
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0' address space 'lmb_bram_combined' 0x00000000:0x0000FFFF (64 KBytes).
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_SPACE lmb_bram_combined RAMB16 [0x00000000:0x0000FFFF]
BUS_BLOCK
lmb_bram/lmb_bram/ramb16bwer_0 [31:31] INPUT = lmb_bram_combined_0.mem PLACED = X3Y24;
lmb_bram/lmb_bram/ramb16bwer_1 [30:30] INPUT = lmb_bram_combined_1.mem PLACED = X2Y26;
lmb_bram/lmb_bram/ramb16bwer_2 [29:29] INPUT = lmb_bram_combined_2.mem PLACED = X3Y26;
lmb_bram/lmb_bram/ramb16bwer_3 [28:28] INPUT = lmb_bram_combined_3.mem PLACED = X3Y22;
lmb_bram/lmb_bram/ramb16bwer_4 [27:27] INPUT = lmb_bram_combined_4.mem PLACED = X3Y30;
lmb_bram/lmb_bram/ramb16bwer_5 [26:26] INPUT = lmb_bram_combined_5.mem PLACED = X2Y28;
lmb_bram/lmb_bram/ramb16bwer_6 [25:25] INPUT = lmb_bram_combined_6.mem PLACED = X2Y30;
lmb_bram/lmb_bram/ramb16bwer_7 [24:24] INPUT = lmb_bram_combined_7.mem PLACED = X3Y32;
lmb_bram/lmb_bram/ramb16bwer_8 [23:23] INPUT = lmb_bram_combined_8.mem PLACED = X1Y34;
lmb_bram/lmb_bram/ramb16bwer_9 [22:22] INPUT = lmb_bram_combined_9.mem PLACED = X2Y52;
lmb_bram/lmb_bram/ramb16bwer_10 [21:21] INPUT = lmb_bram_combined_10.mem PLACED = X2Y50;
lmb_bram/lmb_bram/ramb16bwer_11 [20:20] INPUT = lmb_bram_combined_11.mem PLACED = X2Y48;
lmb_bram/lmb_bram/ramb16bwer_12 [19:19] INPUT = lmb_bram_combined_12.mem PLACED = X2Y46;
lmb_bram/lmb_bram/ramb16bwer_13 [18:18] INPUT = lmb_bram_combined_13.mem PLACED = X2Y32;
lmb_bram/lmb_bram/ramb16bwer_14 [17:17] INPUT = lmb_bram_combined_14.mem PLACED = X1Y30;
lmb_bram/lmb_bram/ramb16bwer_15 [16:16] INPUT = lmb_bram_combined_15.mem PLACED = X1Y32;
lmb_bram/lmb_bram/ramb16bwer_16 [15:15] INPUT = lmb_bram_combined_16.mem PLACED = X2Y18;
lmb_bram/lmb_bram/ramb16bwer_17 [14:14] INPUT = lmb_bram_combined_17.mem PLACED = X2Y20;
lmb_bram/lmb_bram/ramb16bwer_18 [13:13] INPUT = lmb_bram_combined_18.mem PLACED = X2Y14;
lmb_bram/lmb_bram/ramb16bwer_19 [12:12] INPUT = lmb_bram_combined_19.mem PLACED = X2Y16;
lmb_bram/lmb_bram/ramb16bwer_20 [11:11] INPUT = lmb_bram_combined_20.mem PLACED = X2Y44;
lmb_bram/lmb_bram/ramb16bwer_21 [10:10] INPUT = lmb_bram_combined_21.mem PLACED = X2Y42;
lmb_bram/lmb_bram/ramb16bwer_22 [9:9] INPUT = lmb_bram_combined_22.mem PLACED = X2Y38;
lmb_bram/lmb_bram/ramb16bwer_23 [8:8] INPUT = lmb_bram_combined_23.mem PLACED = X2Y40;
lmb_bram/lmb_bram/ramb16bwer_24 [7:7] INPUT = lmb_bram_combined_24.mem PLACED = X2Y24;
lmb_bram/lmb_bram/ramb16bwer_25 [6:6] INPUT = lmb_bram_combined_25.mem PLACED = X1Y28;
lmb_bram/lmb_bram/ramb16bwer_26 [5:5] INPUT = lmb_bram_combined_26.mem PLACED = X2Y22;
lmb_bram/lmb_bram/ramb16bwer_27 [4:4] INPUT = lmb_bram_combined_27.mem PLACED = X3Y28;
lmb_bram/lmb_bram/ramb16bwer_28 [3:3] INPUT = lmb_bram_combined_28.mem PLACED = X3Y34;
lmb_bram/lmb_bram/ramb16bwer_29 [2:2] INPUT = lmb_bram_combined_29.mem PLACED = X3Y36;
lmb_bram/lmb_bram/ramb16bwer_30 [1:1] INPUT = lmb_bram_combined_30.mem PLACED = X2Y34;
lmb_bram/lmb_bram/ramb16bwer_31 [0:0] INPUT = lmb_bram_combined_31.mem PLACED = X2Y36;
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;
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<?xml version="1.0" standalone="no"?>
<!DOCTYPE stylesheet [
<!ENTITY UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ">
<!ENTITY LOWERCASE "abcdefghijklmnopqrstuvwxyz">
<!ENTITY UPPER2LOWER " '&UPPERCASE;' , '&LOWERCASE;' ">
<!ENTITY LOWER2UPPER " '&LOWERCASE;' , '&UPPERCASE;' ">
<!ENTITY ALPHALOWER "ABCDEFxX0123456789">
<!ENTITY HEXUPPER "ABCDEFxX0123456789">
<!ENTITY HEXLOWER "abcdefxX0123456789">
<!ENTITY HEXU2L " '&HEXLOWER;' , '&HEXUPPER;' ">
]>
<xsl:stylesheet version="1.0"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:exsl="http://exslt.org/common"
xmlns:dyn="http://exslt.org/dynamic"
xmlns:math="http://exslt.org/math"
xmlns:xlink="http://www.w3.org/1999/xlink"
extension-element-prefixes="math exsl dyn xlink">
<xsl:include href="edw2xtl_sav_globals.xsl"/>
<xsl:include href="edw2xtl_sav_view_addr.xsl"/>
<xsl:include href="edw2xtl_sav_view_busif.xsl"/>
<xsl:include href="edw2xtl_sav_view_port.xsl"/>
<xsl:include href="edw2xtl_sav_view_groups.xsl"/>
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"/>
<xsl:param name="P_SYSTEM_XML" select= "'__UNDEF__'"/>
<xsl:param name="P_GROUPS_XML" select= "'__UNDEF__'"/>
<xsl:param name="G_DEBUG" select="'FALSE'"/>
<xsl:param name="G_ADD_CHOICES" select="'TRUE'"/>
<!--
<xsl:param name="P_VIEW" select="'__UNDEF__'"/>
<xsl:param name="P_MODE" select="'__UNDEF__'"/>
<xsl:param name="P_SCOPE" select="'__UNDEF__'"/>
-->
<!-- MAIN TEMPLATE -->
<xsl:template match="SAV[@VIEW]">
<xsl:if test="$G_DEBUG='TRUE'">
<xsl:message>SAV VIEW <xsl:value-of select="@VIEW"/></xsl:message>
<xsl:message>SAV MODE <xsl:value-of select="@MODE"/></xsl:message>
<xsl:message>SAV SCOPE <xsl:value-of select="@SCOPE"/></xsl:message>
</xsl:if>
<xsl:choose>
<xsl:when test="not(@VIEW = 'PORT') and not(@VIEW = 'BUSINTERFACE') and not(@VIEW = 'ADDRESS')">
<xsl:message>EDW2SAV XTELLER ERROR: UNDEFINED VIEW <xsl:value-of select="@VIEW"/></xsl:message>
</xsl:when>
<xsl:when test="(@MODE and not(@MODE = 'FLAT') and not(@MODE = 'TREE') and not(@MODE = 'GROUPS'))">
<xsl:message>EDW2SAV XTELLER ERROR: UNDEFINED MODE <xsl:value-of select="@MODE"/></xsl:message>
</xsl:when>
<xsl:when test="(@SCOPE and not(@SCOPE = 'FULL') and not(@SCOPE= 'FOCUS'))">
<xsl:message>EDW2SAV XTELLER ERROR: UNDEFINED SCOPE <xsl:value-of select="@SCOPE"/></xsl:message>
</xsl:when>
<xsl:when test="$P_SYSTEM_XML ='__UNDEF__'">
<xsl:message>EDW2SAV XTELLER ERROR: SYSTEM XML UNDEFINED</xsl:message>
</xsl:when>
<xsl:when test="not($G_SYS)" >
<xsl:message>EDW2SAV XTELLER ERROR: EDKSYSTEM MISSING in SYSTEM XML <xsl:value-of select="$P_SYSTEM_XML"/></xsl:message>
</xsl:when>
<xsl:when test="($P_GROUPS_XML ='__UNDEF__') and (@MODE = 'GROUPS')" >
<xsl:message>EDW2SAV XTELLER ERROR: GROUP XML UNDEFINED for FOCUS</xsl:message>
</xsl:when>
<xsl:when test="($P_GROUPS_XML ='__UNDEF__') and (@SCOPE = 'FOCUS') and (@VIEW = 'BUSINTERFACE')" >
<xsl:message>EDW2SAV XTELLER ERROR: GROUP XML UNDEFINED for SCOPE</xsl:message>
</xsl:when>
<xsl:otherwise>
<xsl:if test="$G_DEBUG='TRUE'">
<xsl:message>SYSTEM XML <xsl:value-of select="$P_SYSTEM_XML"/></xsl:message>
<xsl:message>GROUPS XML <xsl:value-of select="$P_GROUPS_XML"/></xsl:message>
</xsl:if>
<xsl:variable name="use_mode_">
<xsl:choose>
<xsl:when test="@MODE = 'GROUPS'">TREE</xsl:when>
<xsl:otherwise><xsl:value-of select="@MODE"/></xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="num_procs_focused_on_" select="count(MASTER)"/>
<xsl:variable name="num_buses_focused_on_" select="count(BUS)"/>
<xsl:element name="SET">
<xsl:attribute name="CLASS">PROJECT</xsl:attribute>
<xsl:attribute name="VIEW_ID"><xsl:value-of select="@VIEW"/></xsl:attribute>
<xsl:attribute name="DISPLAYMODE"><xsl:value-of select="$use_mode_"/></xsl:attribute>
<xsl:choose>
<!-- ADDRESS TAB VIEW -->
<xsl:when test="(@VIEW = 'ADDRESS')">
<xsl:call-template name="WRITE_VIEW_ADDRESS"/>
</xsl:when>
<!-- BIF TAB VIEWS -->
<xsl:when test="((@VIEW ='BUSINTERFACE') and (@SCOPE = 'FOCUS') and ($num_procs_focused_on_ &gt; 0))">
<xsl:call-template name="WRITE_VIEW_BIF_FOCUS_ON_PROCS"/>
</xsl:when>
<!-- BIF TAB VIEWS -->
<xsl:when test="((@VIEW ='BUSINTERFACE') and (@SCOPE = 'FOCUS') and ($num_buses_focused_on_ &gt; 0))">
<xsl:call-template name="WRITE_VIEW_BIF_FOCUS_ON_BUSES"/>
</xsl:when>
<xsl:when test="((@VIEW ='BUSINTERFACE') and (@MODE = 'TREE') and not(@SCOPE))">
<xsl:call-template name="WRITE_VIEW_BIF_TREE"/>
</xsl:when>
<xsl:when test="((@VIEW = 'BUSINTERFACE') and (@MODE = 'FLAT') and not(@SCOPE))">
<xsl:call-template name="WRITE_VIEW_BIF_FLAT"/>
</xsl:when>
<xsl:when test="((@VIEW = 'BUSINTERFACE') and (@MODE = 'GROUPS'))">
<xsl:call-template name="WRITE_VIEW_BIF_GROUPS">
<xsl:with-param name="iModules" select="$G_BLOCKS"/>
</xsl:call-template>
</xsl:when>
<!-- PORT TAB VIEWS -->
<xsl:when test="((@VIEW ='PORT') and (@SCOPE = 'FOCUS'))">
<xsl:call-template name="WRITE_VIEW_PORT_FOCUSED"/>
</xsl:when>
<!-- Generate XTeller panel data for Ports using hierarchy -->
<xsl:when test="((@VIEW = 'PORT') and (@MODE = 'TREE'))">
<xsl:call-template name="WRITE_VIEW_PORT_TREE"/>
</xsl:when>
<!-- Generate XTeller panel data for Ports without hierarchy, (flat view) -->
<xsl:when test="((@VIEW='PORT') and (@MODE = 'FLAT'))">
<xsl:call-template name="WRITE_VIEW_PORT_FLAT"/>
</xsl:when>
<xsl:otherwise>
<xsl:message>ERROR during SAV XTeller generation with panel <xsl:value-of select="@VIEW"/> and display mode <xsl:value-of select="@MODE"/></xsl:message>
</xsl:otherwise>
</xsl:choose>
</xsl:element>
</xsl:otherwise>
</xsl:choose>
</xsl:template>
<xsl:template match="EDKSYSTEM">
<!--
<xsl:message>EDW VERSION <xsl:value-of select="$G_EDWVER"/></xsl:message>
<xsl:message>VIEW <xsl:value-of select="$VIEW"/></xsl:message>
<xsl:message>MODE <xsl:value-of select="$MODE"/></xsl:message>
-->
<xsl:variable name="by_interface_">
<xsl:choose>
<!--
Show interfaces or not
-->
<xsl:when test="(($SHOW_BUSIF ='TRUE') or ($SHOW_IOIF ='TRUE'))">TRUE</xsl:when>
<xsl:otherwise>FALSE</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<!--
<xsl:message>VIEW <xsl:value-of select="$VIEW"/></xsl:message>
<xsl:message>MODE <xsl:value-of select="$MODE"/></xsl:message>
<xsl:message>BY INTERFACE <xsl:value-of select="$by_interface_"/></xsl:message>
-->
<xsl:variable name="displayMode_">
<xsl:choose>
<!--
Hard code view to view for address panel,
always show view in what was formerly
multiprocessor view. See below.
<xsl:when test="(($G_NUM_OF_PROCS &gt; 1) and ($VIEW='ADDRESS'))">TREE</xsl:when>
<xsl:when test="(($G_NUM_OF_PROCS &lt;= 1) and ($VIEW='ADDRESS'))">FLAT</xsl:when>
-->
<xsl:when test="($VIEW='ADDRESS')">TREE</xsl:when>
<xsl:otherwise><xsl:value-of select="$MODE"/></xsl:otherwise>
</xsl:choose>
</xsl:variable>
<SET CLASS="PROJECT" VIEW= "{$VIEW}" MODE="{$displayMode_}">
<xsl:choose>
<!-- Generate XTeller panel data for Bus Interfaces using hierarchy -->
<xsl:when test="(($VIEW='BUSINTERFACE') and (not($MODE) or ($MODE = 'TREE')))">
<xsl:call-template name="WRITE_VIEW_BIF_TREE"/>
</xsl:when>
<!-- Generate XTeller panel data for Bus Interfaces without hierarchy, (flat view) -->
<xsl:when test="(($VIEW='BUSINTERFACE') and ($MODE = 'FLAT'))">
<xsl:call-template name="WRITE_VIEW_BIF_FLAT"/>
</xsl:when>
<!-- Generate XTeller panel data for Ports using hierarchy -->
<xsl:when test="(($VIEW='PORT') and (not($MODE) or ($MODE = 'TREE')))">
<xsl:call-template name="WRITE_VIEW_PORT_TREE"/>
</xsl:when>
<!-- Generate XTeller panel data for Ports without hierarchy, (flat view) -->
<xsl:when test="(($VIEW='PORT') and ($MODE = 'FLAT'))">
<xsl:call-template name="WRITE_VIEW_PORT_FLAT"/>
</xsl:when>
<!--
Hard code display of the address panel to always the the same.
No more tree or flat mode, always show address panel
in what was formerly the multiprocessor view.
-->
<xsl:when test="($VIEW='ADDRESS')">
<xsl:call-template name="WRITE_VIEW_ADDRESS"/>
</xsl:when>
<xsl:otherwise>
<xsl:message>ERROR during SAV XTeller generation with panel <xsl:value-of select="$VIEW"/> and display mode <xsl:value-of select="$MODE"/></xsl:message>
</xsl:otherwise>
</xsl:choose>
</SET>
</xsl:template>
</xsl:stylesheet>
This diff is collapsed.
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<SAV MODE="TREE" VIEW="ADDRESS"/>
\ No newline at end of file
This diff is collapsed.
MessageCaptureEnabled: TRUE
MessageFilteringEnabled: FALSE
IncrementalMessagingEnabled: TRUE
-p xc6slx45csg324-2 -lang vhdl$(PROJECT_SEARCHPATHOPT) $(GLOBAL_SEARCHPATHOPT) -msg __xps/ise/xmsgprops.lst
-p spartan6 -lang vhdl$(PROJECT_SEARCHPATHOPT) $(GLOBAL_SEARCHPATHOPT) -msg __xps/ise/xmsgprops.lst -s isim
This diff is collapsed.
-device xc6slx45csg324-2 data\system.ucf 7 0
-device xc6slx45csg324-2 data\system.ucf 0
------------------------------------------------------------------------------
-- clock_generator_0.log
------------------------------------------------------------------------------
Clock generation result : PASSED
------------------------------------------------------------------------------
-- end of clock_generator_0.log
------------------------------------------------------------------------------
# Atlys
Net fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin<0> LOC=E4 | IOSTANDARD=LVCMOS18;
Net fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin<1> LOC=T5 | IOSTANDARD=LVCMOS33;
Net fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin<2> LOC=R5 | IOSTANDARD=LVCMOS33;
Net fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin<3> LOC=P12 | IOSTANDARD=LVCMOS33;
Net fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin<4> LOC=P15 | IOSTANDARD=LVCMOS33;
Net fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin<5> LOC=C14 | IOSTANDARD=LVCMOS33;
Net fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin<6> LOC=D14 | IOSTANDARD=LVCMOS33;
Net fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin<7> LOC=A10 | IOSTANDARD=LVCMOS33;
Net fpga_0_LEDs_8Bits_GPIO_IO_O_pin<0> LOC=N12 | IOSTANDARD=LVCMOS33;
Net fpga_0_LEDs_8Bits_GPIO_IO_O_pin<1> LOC=P16 | IOSTANDARD=LVCMOS33;
Net fpga_0_LEDs_8Bits_GPIO_IO_O_pin<2> LOC=D4 | IOSTANDARD=LVCMOS33;
Net fpga_0_LEDs_8Bits_GPIO_IO_O_pin<3> LOC=M13 | IOSTANDARD=LVCMOS33;
Net fpga_0_LEDs_8Bits_GPIO_IO_O_pin<4> LOC=L14 | IOSTANDARD=LVCMOS33;
Net fpga_0_LEDs_8Bits_GPIO_IO_O_pin<5> LOC=N14 | IOSTANDARD=LVCMOS33;
Net fpga_0_LEDs_8Bits_GPIO_IO_O_pin<6> LOC=M14 | IOSTANDARD=LVCMOS33;
Net fpga_0_LEDs_8Bits_GPIO_IO_O_pin<7> LOC=U18 | IOSTANDARD=LVCMOS33;
Net fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin<0> LOC=N4 | IOSTANDARD=LVCMOS18;
Net fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin<1> LOC=P4 | IOSTANDARD=LVCMOS18;
Net fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin<2> LOC=P3 | IOSTANDARD=LVCMOS18;
Net fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin<3> LOC=F6 | IOSTANDARD=LVCMOS18;
Net fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin<4> LOC=F5 | IOSTANDARD=LVCMOS18;
Net fpga_0_clk_1_sys_clk_pin TNM_NET = sys_clk_pin;
TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 100000 kHz;
Net fpga_0_clk_1_sys_clk_pin LOC=L15 | IOSTANDARD=LVCMOS33;
Net fpga_0_rst_1_sys_rst_pin TIG;
Net fpga_0_rst_1_sys_rst_pin LOC=T15 | IOSTANDARD=LVCMOS33;
# SPI
NET "spiifc_0_SPI_CLK_pin" LOC = R10 | IOSTANDARD = LVCMOS33;
NET "spiifc_0_SPI_MISO_pin" LOC = U16 | IOSTANDARD = LVCMOS33;
NET "spiifc_0_SPI_MOSI_pin" LOC = U15 | IOSTANDARD = LVCMOS33;
NET "spiifc_0_SPI_SS_pin" LOC = M11 | IOSTANDARD = LVCMOS33;
##############################################################################
## Filename: C:\Users\mjlyons\workspace\vSPI\projnav\xps/drivers/spiifc_v1_00_a/data/spiifc_v2_1_0.mdd
## Description: Microprocessor Driver Definition
## Date: Tue Feb 28 11:11:28 2012 (by Create and Import Peripheral Wizard)
##############################################################################
OPTION psf_version = 2.1.0;
BEGIN DRIVER spiifc
OPTION supported_peripherals = (spiifc);
OPTION depends = (common_v1_00_a);
OPTION copyfiles = all;
BEGIN ARRAY interrupt_handler
PROPERTY desc = "Interrupt Handler Information";
PROPERTY size = 1, permit = none;
PARAM name = int_handler, default = SPIIFC_Intr_DefaultHandler, desc = "Name of Interrupt Handler", type = string;
PARAM name = int_port, default = IP2INTC_Irpt, desc = "Interrupt pin associated with the interrupt handler", permit = none;
END ARRAY
END DRIVER
##############################################################################
## Filename: C:\Users\mjlyons\workspace\vSPI\projnav\xps/drivers/spiifc_v1_00_a/data/spiifc_v2_1_0.tcl
## Description: Microprocess Driver Command (tcl)
## Date: Tue Feb 28 11:11:28 2012 (by Create and Import Peripheral Wizard)
##############################################################################
#uses "xillib.tcl"
proc generate {drv_handle} {
xdefine_include_file $drv_handle "xparameters.h" "spiifc" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_MEM0_BASEADDR" "C_MEM0_HIGHADDR" "C_MEM1_BASEADDR" "C_MEM1_HIGHADDR"
}
##############################################################################
## Filename: C:\Users\mjlyons\workspace\vSPI\projnav\xps/drivers/spiifc_v1_00_a/src/Makefile
## Description: Microprocessor Driver Makefile
## Date: Tue Feb 28 11:11:28 2012 (by Create and Import Peripheral Wizard)
##############################################################################
COMPILER=
ARCHIVER=
CP=cp
COMPILER_FLAGS=
EXTRA_COMPILER_FLAGS=
LIB=libxil.a
RELEASEDIR=../../../lib
INCLUDEDIR=../../../include
INCLUDES=-I./. -I${INCLUDEDIR}
INCLUDEFILES=*.h
LIBSOURCES=*.c
OUTS = *.o
libs:
echo "Compiling spiifc"
$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES)
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OUTS}
make clean
include:
${CP} $(INCLUDEFILES) $(INCLUDEDIR)
clean:
rm -rf ${OUTS}
/*****************************************************************************
* Filename: C:\Users\mjlyons\workspace\vSPI\projnav\xps/drivers/spiifc_v1_00_a/src/spiifc.c
* Version: 1.00.a
* Description: spiifc Driver Source File
* Date: Tue Feb 28 11:11:28 2012 (by Create and Import Peripheral Wizard)
*****************************************************************************/
/***************************** Include Files *******************************/
#include "spiifc.h"
/************************** Function Definitions ***************************/
/**
*
* Enable all possible interrupts from SPIIFC device.
*
* @param baseaddr_p is the base address of the SPIIFC device.
*
* @return None.
*
* @note None.
*
*/
void SPIIFC_EnableInterrupt(void * baseaddr_p)
{
Xuint32 baseaddr;
baseaddr = (Xuint32) baseaddr_p;
/*
* Enable all interrupt source from user logic.
*/
SPIIFC_mWriteReg(baseaddr, SPIIFC_INTR_IPIER_OFFSET, 0x00000001);
/*
* Set global interrupt enable.
*/
SPIIFC_mWriteReg(baseaddr, SPIIFC_INTR_DGIER_OFFSET, INTR_GIE_MASK);
}
/**
*
* Example interrupt controller handler for SPIIFC device.
* This is to show example of how to toggle write back ISR to clear interrupts.
*
* @param baseaddr_p is the base address of the SPIIFC device.
*
* @return None.
*
* @note None.
*
*/
void SPIIFC_Intr_DefaultHandler(void * baseaddr_p)
{
Xuint32 baseaddr;
Xuint32 IntrStatus;
Xuint32 IpStatus;
baseaddr = (Xuint32) baseaddr_p;
{
xil_printf("User logic interrupt! \n\r");
IpStatus = SPIIFC_mReadReg(baseaddr, SPIIFC_INTR_IPISR_OFFSET);
SPIIFC_mWriteReg(baseaddr, SPIIFC_INTR_IPISR_OFFSET, IpStatus);
}
}
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-g TdoPin:PULLNONE
-g StartUpClk:JTAGCLK
#add other options here.
setMode -bscan
setCable -p auto
identify
assignfile -p 1 -file implementation/download.bit
program -p 1
quit
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##############################################################################
## Filename: C:\Users\mjlyons\workspace\vSPI\projnav\xps\pcores/spiifc_v1_00_a/data/spiifc_v2_1_0.bbd
## Description: Black Box Definition
## Date: Wed Mar 14 16:37:23 2012 (by Create and Import Peripheral Wizard)
##############################################################################
Files
################################################################################
buffermem.ngc
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-intstyle "ise" -incremental -lib "unisims_ver" -lib "unimacro_ver" -lib "xilinxcorelib_ver" -lib "secureip" -o "C:/Users/mjlyons/workspace/vSPI/projnav/xps/pcores/spiifc_v1_00_a/devl/projnav/spiifc_writereg_tb_isim_beh.exe" -prj "C:/Users/mjlyons/workspace/vSPI/projnav/xps/pcores/spiifc_v1_00_a/devl/projnav/spiifc_writereg_tb_beh.prj" "work.spiifc_writereg_tb" "work.glbl"
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