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rasky
Rasky_hw
Commits
0f12a941
Commit
0f12a941
authored
Sep 03, 2015
by
Franco (nextime) Lanza
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CPLD sheet complete
parent
367c73a8
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782 additions
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107 deletions
+782
-107
FPGA.sch
FPGA.sch
+641
-76
Rasky_v1-cache.lib
Rasky_v1-cache.lib
+60
-0
Rasky_v1.sch
Rasky_v1.sch
+81
-31
No files found.
FPGA.sch
View file @
0f12a941
...
@@ -167,6 +167,100 @@ NoConn ~ 4800 2750
...
@@ -167,6 +167,100 @@ NoConn ~ 4800 2750
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...
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...
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Rasky_v1-cache.lib
View file @
0f12a941
...
@@ -154,6 +154,45 @@ X (ADC4/TCK)PF4 39 1200 -1050 300 L 50 50 1 1 I
...
@@ -154,6 +154,45 @@ X (ADC4/TCK)PF4 39 1200 -1050 300 L 50 50 1 1 I
ENDDRAW
ENDDRAW
ENDDEF
ENDDEF
#
#
# AVR-JTAG-10
#
DEF AVR-JTAG-10 CON 0 40 Y Y 1 F N
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F3 "" 0 0 60 H V C CNN
$FPLIST
AVR-JTAG-10
$ENDFPLIST
DRAW
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X ~ 7 -200 -100 100 R 40 40 1 1 P
X ~ 8 50 -100 100 L 40 40 1 1 P
X ~ 9 -200 -200 100 R 40 40 1 1 P
X ~ 10 50 -200 100 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X01
# CONN_01X01
#
#
DEF CONN_01X01 P 0 40 Y N 1 F N
DEF CONN_01X01 P 0 40 Y N 1 F N
...
@@ -446,6 +485,27 @@ X A16 39 -700 -500 300 R 60 60 1 1 I
...
@@ -446,6 +485,27 @@ X A16 39 -700 -500 300 R 60 60 1 1 I
ENDDRAW
ENDDRAW
ENDDEF
ENDDEF
#
#
# Led_Small
#
DEF Led_Small D 0 10 N N 1 F N
F0 "D" -50 125 50 H V L CNN
F1 "Led_Small" -175 -100 50 H V L CNN
F2 "" 0 0 60 V V C CNN
F3 "" 0 0 60 V V C CNN
$FPLIST
CP*
SM*
$ENDFPLIST
DRAW
P 2 0 1 0 -30 -40 -30 40 N
P 4 0 1 0 30 -40 -30 0 30 40 30 -40 F
P 5 0 1 0 0 30 -20 50 -10 50 -20 50 -20 40 N
P 5 0 1 0 20 50 0 70 10 70 0 70 0 60 N
X K 1 -100 0 70 R 40 40 1 1 P
X A 2 100 0 70 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# MC1413
# MC1413
#
#
DEF MC1413 U 0 40 Y Y 1 F N
DEF MC1413 U 0 40 Y Y 1 F N
...
...
Rasky_v1.sch
View file @
0f12a941
...
@@ -105,23 +105,33 @@ Comment3 ""
...
@@ -105,23 +105,33 @@ Comment3 ""
Comment4 ""
Comment4 ""
$EndDescr
$EndDescr
$Sheet
$Sheet
S 1400
3200 950 700
S 1400
2850 950 1050
U 55CDFACC
U 55CDFACC
F0 "VENCODER" 60
F0 "VENCODER" 60
F1 "FPGA.sch" 60
F1 "FPGA.sch" 60
F2 "SRAM_IO[0..7]" B R 2350 2950 60
F3 "SRAM_A[0..18]" I R 2350 3050 60
F4 "PIX[0..7]" I R 2350 3150 60
F5 "SRAM_OE" I R 2350 3250 60
F6 "TVP_HSOUT" I R 2350 3350 60
F7 "TVP_VSOUT" I R 2350 3450 60
F8 "TVP_DATACLK" I R 2350 3550 60
F9 "SRAM_WE" I R 2350 3650 60
F10 "SRAM_CE" I R 2350 3750 60
F11 "VBUF_SPI" B R 2350 3850 60
$EndSheet
$EndSheet
$Sheet
$Sheet
S 1400
21
00 950 800
S 1400
18
00 950 800
U 55CF4C76
U 55CF4C76
F0 "TVP7002" 60
F0 "TVP7002" 60
F1 "TVP7002.sch" 60
F1 "TVP7002.sch" 60
F2 "TVP_PWDOWN" I R 2350
22
00 60
F2 "TVP_PWDOWN" I R 2350
19
00 60
F3 "TVP_RESET" I R 2350 2
3
00 60
F3 "TVP_RESET" I R 2350 2
0
00 60
F4 "TVP_I2C" B R 2350 2
4
00 60
F4 "TVP_I2C" B R 2350 2
1
00 60
F5 "TVP_DATACLK" I R 2350 2
5
00 60
F5 "TVP_DATACLK" I R 2350 2
2
00 60
F6 "TVP_VSOUT" O R 2350 2
6
00 60
F6 "TVP_VSOUT" O R 2350 2
3
00 60
F7 "TVP_HSOUT" O R 2350 2
7
00 60
F7 "TVP_HSOUT" O R 2350 2
4
00 60
F8 "PIX[0..7]" O R 2350 2
8
00 60
F8 "PIX[0..7]" O R 2350 2
5
00 60
$EndSheet
$EndSheet
$Sheet
$Sheet
S 1400 5100 950 700
S 1400 5100 950 700
...
@@ -798,25 +808,33 @@ Text Label 4500 2750 0 60 ~ 0
...
@@ -798,25 +808,33 @@ Text Label 4500 2750 0 60 ~ 0
REL_1
REL_1
Text Label 4500 2850 0 60 ~ 0
Text Label 4500 2850 0 60 ~ 0
REL_2
REL_2
Text Label 2400
22
00 0 60 ~ 0
Text Label 2400
19
00 0 60 ~ 0
TVP_PWDOWN
TVP_PWDOWN
Text Label 2400 2
3
00 0 60 ~ 0
Text Label 2400 2
0
00 0 60 ~ 0
TVP_RESET
TVP_RESET
Text Label 2750 2
4
00 2 60 ~ 0
Text Label 2750 2
1
00 2 60 ~ 0
TVP_I2C
TVP_I2C
NoConn ~ 9900 1850
NoConn ~ 9900 1850
NoConn ~ 9900 1950
NoConn ~ 9900 1950
NoConn ~ 9900 2050
NoConn ~ 9900 2050
NoConn ~ 9900 5600
NoConn ~ 9900 5600
NoConn ~ 9900 5700
NoConn ~ 9900 5700
Text Label 2400 2
5
00 0 60 ~ 0
Text Label 2400 2
2
00 0 60 ~ 0
TVP_DATACLK
TVP_DATACLK
Text Label 2400 2
6
00 0 60 ~ 0
Text Label 2400 2
3
00 0 60 ~ 0
TVP_VSOUT
TVP_VSOUT
Text Label 2400 2
7
00 0 60 ~ 0
Text Label 2400 2
4
00 0 60 ~ 0
TVP_HSOUT
TVP_HSOUT
Text Label 2400 2
8
00 0 60 ~ 0
Text Label 2400 2
5
00 0 60 ~ 0
PIX[0..7]
PIX[0..7]
Text Label 2450 5200 0 60 ~ 0
DIN_1
Text Label 2450 5350 0 60 ~ 0
DIN_2
Text Label 2450 5500 0 60 ~ 0
REL_1
Text Label 2450 5650 0 60 ~ 0
REL_2
Wire Wire Line
Wire Wire Line
7150 1250 6850 1250
7150 1250 6850 1250
Wire Wire Line
Wire Wire Line
...
@@ -1135,19 +1153,19 @@ Wire Wire Line
...
@@ -1135,19 +1153,19 @@ Wire Wire Line
Wire Wire Line
Wire Wire Line
4950 2850 4450 2850
4950 2850 4450 2850
Wire Wire Line
Wire Wire Line
2350
2200 2800 22
00
2350
1900 2800 19
00
Wire Wire Line
Wire Wire Line
2350 2
300 2800 23
00
2350 2
000 2800 20
00
Wire Bus Line
Wire Bus Line
2350 2
400 2800 24
00
2350 2
100 2800 21
00
Wire Wire Line
Wire Wire Line
2350 2
500 2800 25
00
2350 2
200 2800 22
00
Wire Wire Line
Wire Wire Line
2350 2
600 2800 26
00
2350 2
300 2800 23
00
Wire Wire Line
Wire Wire Line
2350 2
700 2800 27
00
2350 2
400 2800 24
00
Wire Bus Line
Wire Bus Line
2350 2
800 2800 28
00
2350 2
500 2800 25
00
Wire Wire Line
Wire Wire Line
2350 5200 2800 5200
2350 5200 2800 5200
Wire Wire Line
Wire Wire Line
...
@@ -1156,12 +1174,44 @@ Wire Wire Line
...
@@ -1156,12 +1174,44 @@ Wire Wire Line
2350 5500 2800 5500
2350 5500 2800 5500
Wire Wire Line
Wire Wire Line
2350 5650 2800 5650
2350 5650 2800 5650
Text Label 2450 5200 0 60 ~ 0
Wire Bus Line
DIN_1
2350 2950 2850 2950
Text Label 2450 5350 0 60 ~ 0
Wire Bus Line
DIN_2
2350 3050 2850 3050
Text Label 2450 5500 0 60 ~ 0
Wire Bus Line
REL_1
2350 3150 2850 3150
Text Label 2450 5650 0 60 ~ 0
Wire Wire Line
REL_2
2350 3250 2850 3250
Wire Wire Line
2350 3650 2850 3650
Wire Wire Line
2350 3750 2850 3750
Text Label 2450 2950 0 60 ~ 0
SRAM_IO[0..7]
Text Label 2450 3050 0 60 ~ 0
SRAM_A[0..18]
Text Label 2450 3150 0 60 ~ 0
PIX[0..7]
Wire Bus Line
2350 3850 2850 3850
Wire Wire Line
2350 3350 2850 3350
Wire Wire Line
2350 3450 2850 3450
Wire Wire Line
2350 3550 2850 3550
Text Label 2450 3250 0 60 ~ 0
SRAM_OE
Text Label 2450 3350 0 60 ~ 0
TVP_HSOUT
Text Label 2450 3450 0 60 ~ 0
TVP_VSOUT
Text Label 2450 3550 0 60 ~ 0
TVP_DATACLK
Text Label 2450 3650 0 60 ~ 0
SRAM_WE
Text Label 2450 3750 0 60 ~ 0
SRAM_CE
Text Label 2450 3850 0 60 ~ 0
VBUF_SPI
$EndSCHEMATC
$EndSCHEMATC
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