Added is61lv5128al SRAM

parent aafe15b7
EESchema-DOCLIB Version 2.0
#
$CMP IS61LV5128AL
D SRAM HIGH-SPEED CMOS STATIC RAM 4Mbits 8x512k
K IS61LV5128AL SRAM
F http://www.farnell.com/datasheets/7292.pdf
$ENDCMP
#
#End Doc Library
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# IS61LV5128AL
#
DEF IS61LV5128AL U 0 40 Y Y 1 F N
F0 "U" -350 1200 70 H V L CNN
F1 "IS61LV5128AL" -300 -1200 70 H V L CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
S -400 1150 400 -1150 0 1 0 N
X A0 3 -700 1100 300 R 60 60 1 1 I
X A1 4 -700 1000 300 R 60 60 1 1 I
X A2 5 -700 900 300 R 60 60 1 1 I
X A3 6 -700 800 300 R 60 60 1 1 I
X A4 7 -700 700 300 R 60 60 1 1 I
X CE 8 -700 -1100 300 R 60 60 1 1 I I
X IO0 9 700 1100 300 L 60 60 1 1 T
X IO1 10 700 1000 300 L 60 60 1 1 T
X A9 20 -700 200 300 R 60 60 1 1 I
X A14 30 -700 -300 300 R 60 60 1 1 I
X A17 40 -700 -600 300 R 60 60 1 1 I
X VDD 11 600 -750 200 L 50 50 1 1 I
X IO4 31 700 700 300 L 60 60 1 1 T
X A18 41 -700 -700 300 R 60 60 1 1 I
X GND 12 600 -950 200 L 50 50 1 1 I
X IO5 32 700 600 300 L 60 60 1 1 T
X IO2 13 700 900 300 L 60 60 1 1 T
X VDD 33 600 -850 200 L 50 50 1 1 I
X IO3 14 700 800 300 L 60 60 1 1 T
X GND 34 600 -1050 200 L 50 50 1 1 I
X WE 15 -700 -1000 300 R 60 60 1 1 I L
X IO6 35 700 500 300 L 60 60 1 1 T
X A5 16 -700 600 300 R 60 60 1 1 I
X A10 26 -700 100 300 R 60 60 1 1 I
X IO7 36 700 400 300 L 60 60 1 1 T
X A6 17 -700 500 300 R 60 60 1 1 I
X A11 27 -700 0 300 R 60 60 1 1 I
X OE 37 -700 -900 300 R 60 60 1 1 I L
X A7 18 -700 400 300 R 60 60 1 1 I
X A12 28 -700 -100 300 R 60 60 1 1 I
X A15 38 -700 -400 300 R 60 60 1 1 I
X A8 19 -700 300 300 R 60 60 1 1 I
X A13 29 -700 -200 300 R 60 60 1 1 I
X A16 39 -700 -500 300 R 60 60 1 1 I
ENDDRAW
ENDDEF
#
#End Library
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