Make tests work on public repo as well

PUBLISHED_FROM=78acb18d597b6f47f31da13087fa6685f21ce445

mongoose.c

@@ -35,8 +35,8 @@
 #endif
 
 /* Amalgamated: #include "common/cs_dbg.h" */
-/* Amalgamated: #include "mongoose/src/mg_http.h" */
-/* Amalgamated: #include "mongoose/src/mg_net.h" */
+/* Amalgamated: #include "mg_http.h" */
+/* Amalgamated: #include "mg_net.h" */
 
 #define MG_CTL_MSG_MESSAGE_SIZE 8192
 

src/common/cs_dbg.c

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#include "common/cs_dbg.h"
+
+#include <stdarg.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "common/cs_time.h"
+#include "common/str_util.h"
+
+enum cs_log_level cs_log_threshold WEAK =
+#if CS_ENABLE_DEBUG
+    LL_VERBOSE_DEBUG;
+#else
+    LL_ERROR;
+#endif
+
+static char *s_filter_pattern = NULL;
+static size_t s_filter_pattern_len;
+
+void cs_log_set_filter(const char *pattern) WEAK;
+
+#if CS_ENABLE_STDIO
+
+FILE *cs_log_file WEAK = NULL;
+
+#if CS_LOG_ENABLE_TS_DIFF
+double cs_log_ts WEAK;
+#endif
+
+enum cs_log_level cs_log_cur_msg_level WEAK = LL_NONE;
+
+void cs_log_set_filter(const char *pattern) {
+  free(s_filter_pattern);
+  if (pattern != NULL) {
+    s_filter_pattern = strdup(pattern);
+    s_filter_pattern_len = strlen(pattern);
+  } else {
+    s_filter_pattern = NULL;
+    s_filter_pattern_len = 0;
+  }
+}
+
+int cs_log_print_prefix(enum cs_log_level, const char *, const char *) WEAK;
+int cs_log_print_prefix(enum cs_log_level level, const char *func,
+                        const char *filename) {
+  char prefix[21];
+
+  if (level > cs_log_threshold) return 0;
+  if (s_filter_pattern != NULL &&
+      mg_match_prefix(s_filter_pattern, s_filter_pattern_len, func) == 0 &&
+      mg_match_prefix(s_filter_pattern, s_filter_pattern_len, filename) == 0) {
+    return 0;
+  }
+
+  strncpy(prefix, func, 20);
+  prefix[20] = '\0';
+  if (cs_log_file == NULL) cs_log_file = stderr;
+  cs_log_cur_msg_level = level;
+  fprintf(cs_log_file, "%-20s ", prefix);
+#if CS_LOG_ENABLE_TS_DIFF
+  {
+    double now = cs_time();
+    fprintf(cs_log_file, "%7u ", (unsigned int) ((now - cs_log_ts) * 1000000));
+    cs_log_ts = now;
+  }
+#endif
+  return 1;
+}
+
+void cs_log_printf(const char *fmt, ...) WEAK;
+void cs_log_printf(const char *fmt, ...) {
+  va_list ap;
+  va_start(ap, fmt);
+  vfprintf(cs_log_file, fmt, ap);
+  va_end(ap);
+  fputc('\n', cs_log_file);
+  fflush(cs_log_file);
+  cs_log_cur_msg_level = LL_NONE;
+}
+
+void cs_log_set_file(FILE *file) WEAK;
+void cs_log_set_file(FILE *file) {
+  cs_log_file = file;
+}
+
+#else
+
+void cs_log_set_filter(const char *pattern) {
+  (void) pattern;
+}
+
+#endif /* CS_ENABLE_STDIO */
+
+void cs_log_set_level(enum cs_log_level level) WEAK;
+void cs_log_set_level(enum cs_log_level level) {
+  cs_log_threshold = level;
+#if CS_LOG_ENABLE_TS_DIFF && CS_ENABLE_STDIO
+  cs_log_ts = cs_time();
+#endif
+}

src/common/cs_dbg.h

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#ifndef CS_COMMON_CS_DBG_H_
+#define CS_COMMON_CS_DBG_H_
+
+#include "common/platform.h"
+
+#if CS_ENABLE_STDIO
+#include <stdio.h>
+#endif
+
+#ifndef CS_ENABLE_DEBUG
+#define CS_ENABLE_DEBUG 0
+#endif
+
+#ifndef CS_LOG_ENABLE_TS_DIFF
+#define CS_LOG_ENABLE_TS_DIFF 0
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/*
+ * Log level; `LL_INFO` is the default. Use `cs_log_set_level()` to change it.
+ */
+enum cs_log_level {
+  LL_NONE = -1,
+  LL_ERROR = 0,
+  LL_WARN = 1,
+  LL_INFO = 2,
+  LL_DEBUG = 3,
+  LL_VERBOSE_DEBUG = 4,
+
+  _LL_MIN = -2,
+  _LL_MAX = 5,
+};
+
+/*
+ * Set max log level to print; messages with the level above the given one will
+ * not be printed.
+ */
+void cs_log_set_level(enum cs_log_level level);
+
+/*
+ * Set log filter. NULL (a default) logs everything.
+ * Otherwise, function name and file name will be tested against the given
+ * pattern, and only matching messages will be printed.
+ *
+ * For the pattern syntax, refer to `mg_match_prefix()` in `str_util.h`.
+ *
+ * Example:
+ * ```c
+ * void foo(void) {
+ *   LOG(LL_INFO, ("hello from foo"));
+ * }
+ *
+ * void bar(void) {
+ *   LOG(LL_INFO, ("hello from bar"));
+ * }
+ *
+ * void test(void) {
+ *   cs_log_set_filter(NULL);
+ *   foo();
+ *   bar();
+ *
+ *   cs_log_set_filter("f*");
+ *   foo();
+ *   bar(); // Will NOT print anything
+ *
+ *   cs_log_set_filter("bar");
+ *   foo(); // Will NOT print anything
+ *   bar();
+ * }
+ * ```
+ */
+void cs_log_set_filter(const char *pattern);
+
+/*
+ * Helper function which prints message prefix with the given `level`, function
+ * name `func` and `filename`. If message should be printed (accordingly to the
+ * current log level and filter), prints the prefix and returns 1, otherwise
+ * returns 0.
+ *
+ * Clients should typically just use `LOG()` macro.
+ */
+int cs_log_print_prefix(enum cs_log_level level, const char *func,
+                        const char *filename);
+
+extern enum cs_log_level cs_log_threshold;
+
+#if CS_ENABLE_STDIO
+
+/*
+ * Set file to write logs into. If `NULL`, logs go to `stderr`.
+ */
+void cs_log_set_file(FILE *file);
+
+/*
+ * Prints log to the current log file, appends "\n" in the end and flushes the
+ * stream.
+ */
+void cs_log_printf(const char *fmt, ...)
+#ifdef __GNUC__
+    __attribute__((format(printf, 1, 2)))
+#endif
+    ;
+
+/*
+ * Format and print message `x` with the given level `l`. Example:
+ *
+ * ```c
+ * LOG(LL_INFO, ("my info message: %d", 123));
+ * LOG(LL_DEBUG, ("my debug message: %d", 123));
+ * ```
+ */
+#define LOG(l, x)                                                    \
+  do {                                                               \
+    if (cs_log_print_prefix(l, __func__, __FILE__)) cs_log_printf x; \
+  } while (0)
+
+#ifndef CS_NDEBUG
+
+/*
+ * Shortcut for `LOG(LL_VERBOSE_DEBUG, (...))`
+ */
+#define DBG(x) LOG(LL_VERBOSE_DEBUG, x)
+
+#else /* NDEBUG */
+
+#define DBG(x)
+
+#endif
+
+#else /* CS_ENABLE_STDIO */
+
+#define LOG(l, x)
+#define DBG(x)
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* CS_COMMON_CS_DBG_H_ */

src/common/cs_md5.c

+/*
+ * This code implements the MD5 message-digest algorithm.
+ * The algorithm is due to Ron Rivest.  This code was
+ * written by Colin Plumb in 1993, no copyright is claimed.
+ * This code is in the public domain; do with it what you wish.
+ *
+ * Equivalent code is available from RSA Data Security, Inc.
+ * This code has been tested against that, and is equivalent,
+ * except that you don't need to include two pages of legalese
+ * with every copy.
+ *
+ * To compute the message digest of a chunk of bytes, declare an
+ * MD5Context structure, pass it to MD5Init, call MD5Update as
+ * needed on buffers full of bytes, and then call MD5Final, which
+ * will fill a supplied 16-byte array with the digest.
+ */
+
+#include "common/cs_md5.h"
+#include "common/str_util.h"
+
+#if !defined(EXCLUDE_COMMON)
+#if !CS_DISABLE_MD5
+
+#include "common/cs_endian.h"
+
+static void byteReverse(unsigned char *buf, unsigned longs) {
+/* Forrest: MD5 expect LITTLE_ENDIAN, swap if BIG_ENDIAN */
+#if BYTE_ORDER == BIG_ENDIAN
+  do {
+    uint32_t t = (uint32_t)((unsigned) buf[3] << 8 | buf[2]) << 16 |
+                 ((unsigned) buf[1] << 8 | buf[0]);
+    *(uint32_t *) buf = t;
+    buf += 4;
+  } while (--longs);
+#else
+  (void) buf;
+  (void) longs;
+#endif
+}
+
+#define F1(x, y, z) (z ^ (x & (y ^ z)))
+#define F2(x, y, z) F1(z, x, y)
+#define F3(x, y, z) (x ^ y ^ z)
+#define F4(x, y, z) (y ^ (x | ~z))
+
+#define MD5STEP(f, w, x, y, z, data, s) \
+  (w += f(x, y, z) + data, w = w << s | w >> (32 - s), w += x)
+
+/*
+ * Start MD5 accumulation.  Set bit count to 0 and buffer to mysterious
+ * initialization constants.
+ */
+void cs_md5_init(cs_md5_ctx *ctx) {
+  ctx->buf[0] = 0x67452301;
+  ctx->buf[1] = 0xefcdab89;
+  ctx->buf[2] = 0x98badcfe;
+  ctx->buf[3] = 0x10325476;
+
+  ctx->bits[0] = 0;
+  ctx->bits[1] = 0;
+}
+
+static void cs_md5_transform(uint32_t buf[4], uint32_t const in[16]) {
+  register uint32_t a, b, c, d;
+
+  a = buf[0];
+  b = buf[1];
+  c = buf[2];
+  d = buf[3];
+
+  MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7);
+  MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12);
+  MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17);
+  MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22);
+  MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7);
+  MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12);
+  MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17);
+  MD5STEP(F1, b, c, d, a, in[7] + 0xfd469501, 22);
+  MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7);
+  MD5STEP(F1, d, a, b, c, in[9] + 0x8b44f7af, 12);
+  MD5STEP(F1, c, d, a, b, in[10] + 0xffff5bb1, 17);
+  MD5STEP(F1, b, c, d, a, in[11] + 0x895cd7be, 22);
+  MD5STEP(F1, a, b, c, d, in[12] + 0x6b901122, 7);
+  MD5STEP(F1, d, a, b, c, in[13] + 0xfd987193, 12);
+  MD5STEP(F1, c, d, a, b, in[14] + 0xa679438e, 17);
+  MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22);
+
+  MD5STEP(F2, a, b, c, d, in[1] + 0xf61e2562, 5);
+  MD5STEP(F2, d, a, b, c, in[6] + 0xc040b340, 9);
+  MD5STEP(F2, c, d, a, b, in[11] + 0x265e5a51, 14);
+  MD5STEP(F2, b, c, d, a, in[0] + 0xe9b6c7aa, 20);
+  MD5STEP(F2, a, b, c, d, in[5] + 0xd62f105d, 5);
+  MD5STEP(F2, d, a, b, c, in[10] + 0x02441453, 9);
+  MD5STEP(F2, c, d, a, b, in[15] + 0xd8a1e681, 14);
+  MD5STEP(F2, b, c, d, a, in[4] + 0xe7d3fbc8, 20);
+  MD5STEP(F2, a, b, c, d, in[9] + 0x21e1cde6, 5);
+  MD5STEP(F2, d, a, b, c, in[14] + 0xc33707d6, 9);
+  MD5STEP(F2, c, d, a, b, in[3] + 0xf4d50d87, 14);
+  MD5STEP(F2, b, c, d, a, in[8] + 0x455a14ed, 20);
+  MD5STEP(F2, a, b, c, d, in[13] + 0xa9e3e905, 5);
+  MD5STEP(F2, d, a, b, c, in[2] + 0xfcefa3f8, 9);
+  MD5STEP(F2, c, d, a, b, in[7] + 0x676f02d9, 14);
+  MD5STEP(F2, b, c, d, a, in[12] + 0x8d2a4c8a, 20);
+
+  MD5STEP(F3, a, b, c, d, in[5] + 0xfffa3942, 4);
+  MD5STEP(F3, d, a, b, c, in[8] + 0x8771f681, 11);
+  MD5STEP(F3, c, d, a, b, in[11] + 0x6d9d6122, 16);
+  MD5STEP(F3, b, c, d, a, in[14] + 0xfde5380c, 23);
+  MD5STEP(F3, a, b, c, d, in[1] + 0xa4beea44, 4);
+  MD5STEP(F3, d, a, b, c, in[4] + 0x4bdecfa9, 11);
+  MD5STEP(F3, c, d, a, b, in[7] + 0xf6bb4b60, 16);
+  MD5STEP(F3, b, c, d, a, in[10] + 0xbebfbc70, 23);
+  MD5STEP(F3, a, b, c, d, in[13] + 0x289b7ec6, 4);
+  MD5STEP(F3, d, a, b, c, in[0] + 0xeaa127fa, 11);
+  MD5STEP(F3, c, d, a, b, in[3] + 0xd4ef3085, 16);
+  MD5STEP(F3, b, c, d, a, in[6] + 0x04881d05, 23);
+  MD5STEP(F3, a, b, c, d, in[9] + 0xd9d4d039, 4);
+  MD5STEP(F3, d, a, b, c, in[12] + 0xe6db99e5, 11);
+  MD5STEP(F3, c, d, a, b, in[15] + 0x1fa27cf8, 16);
+  MD5STEP(F3, b, c, d, a, in[2] + 0xc4ac5665, 23);
+
+  MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6);
+  MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10);
+  MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15);
+  MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21);
+  MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6);
+  MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10);
+  MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15);
+  MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21);
+  MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6);
+  MD5STEP(F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10);
+  MD5STEP(F4, c, d, a, b, in[6] + 0xa3014314, 15);
+  MD5STEP(F4, b, c, d, a, in[13] + 0x4e0811a1, 21);
+  MD5STEP(F4, a, b, c, d, in[4] + 0xf7537e82, 6);
+  MD5STEP(F4, d, a, b, c, in[11] + 0xbd3af235, 10);
+  MD5STEP(F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15);
+  MD5STEP(F4, b, c, d, a, in[9] + 0xeb86d391, 21);
+
+  buf[0] += a;
+  buf[1] += b;
+  buf[2] += c;
+  buf[3] += d;
+}
+
+void cs_md5_update(cs_md5_ctx *ctx, const unsigned char *buf, size_t len) {
+  uint32_t t;
+
+  t = ctx->bits[0];
+  if ((ctx->bits[0] = t + ((uint32_t) len << 3)) < t) ctx->bits[1]++;
+  ctx->bits[1] += (uint32_t) len >> 29;
+
+  t = (t >> 3) & 0x3f;
+
+  if (t) {
+    unsigned char *p = (unsigned char *) ctx->in + t;
+
+    t = 64 - t;
+    if (len < t) {
+      memcpy(p, buf, len);
+      return;
+    }
+    memcpy(p, buf, t);
+    byteReverse(ctx->in, 16);
+    cs_md5_transform(ctx->buf, (uint32_t *) ctx->in);
+    buf += t;
+    len -= t;
+  }
+
+  while (len >= 64) {
+    memcpy(ctx->in, buf, 64);
+    byteReverse(ctx->in, 16);
+    cs_md5_transform(ctx->buf, (uint32_t *) ctx->in);
+    buf += 64;
+    len -= 64;
+  }
+
+  memcpy(ctx->in, buf, len);
+}
+
+void cs_md5_final(unsigned char digest[16], cs_md5_ctx *ctx) {
+  unsigned count;
+  unsigned char *p;
+  uint32_t *a;
+
+  count = (ctx->bits[0] >> 3) & 0x3F;
+
+  p = ctx->in + count;
+  *p++ = 0x80;
+  count = 64 - 1 - count;
+  if (count < 8) {
+    memset(p, 0, count);
+    byteReverse(ctx->in, 16);
+    cs_md5_transform(ctx->buf, (uint32_t *) ctx->in);
+    memset(ctx->in, 0, 56);
+  } else {
+    memset(p, 0, count - 8);
+  }
+  byteReverse(ctx->in, 14);
+
+  a = (uint32_t *) ctx->in;
+  a[14] = ctx->bits[0];
+  a[15] = ctx->bits[1];
+
+  cs_md5_transform(ctx->buf, (uint32_t *) ctx->in);
+  byteReverse((unsigned char *) ctx->buf, 4);
+  memcpy(digest, ctx->buf, 16);
+  memset((char *) ctx, 0, sizeof(*ctx));
+}
+
+#endif /* CS_DISABLE_MD5 */
+#endif /* EXCLUDE_COMMON */

src/common/cs_md5.h

+/*
+ * Copyright (c) 2014 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#ifndef CS_COMMON_MD5_H_
+#define CS_COMMON_MD5_H_
+
+#include "common/platform.h"
+
+#ifndef CS_DISABLE_MD5
+#define CS_DISABLE_MD5 0
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+typedef struct {
+  uint32_t buf[4];
+  uint32_t bits[2];
+  unsigned char in[64];
+} cs_md5_ctx;
+
+void cs_md5_init(cs_md5_ctx *c);
+void cs_md5_update(cs_md5_ctx *c, const unsigned char *data, size_t len);
+void cs_md5_final(unsigned char *md, cs_md5_ctx *c);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* CS_COMMON_MD5_H_ */

src/common/cs_time.c

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#include "common/cs_time.h"
+
+#ifndef _WIN32
+#include <stddef.h>
+/*
+ * There is no sys/time.h on ARMCC.
+ */
+#if !(defined(__ARMCC_VERSION) || defined(__ICCARM__)) && \
+    !defined(__TI_COMPILER_VERSION__) &&                  \
+    (!defined(CS_PLATFORM) || CS_PLATFORM != CS_P_NXP_LPC)
+#include <sys/time.h>
+#endif
+#else
+#include <windows.h>
+#endif
+
+double cs_time(void) WEAK;
+double cs_time(void) {
+  double now;
+#ifndef _WIN32
+  struct timeval tv;
+  if (gettimeofday(&tv, NULL /* tz */) != 0) return 0;
+  now = (double) tv.tv_sec + (((double) tv.tv_usec) / 1000000.0);
+#else
+  SYSTEMTIME sysnow;
+  FILETIME ftime;
+  GetLocalTime(&sysnow);
+  SystemTimeToFileTime(&sysnow, &ftime);
+  /*
+   * 1. VC 6.0 doesn't support conversion uint64 -> double, so, using int64
+   * This should not cause a problems in this (21th) century
+   * 2. Windows FILETIME is a number of 100-nanosecond intervals since January
+   * 1, 1601 while time_t is a number of _seconds_ since January 1, 1970 UTC,
+   * thus, we need to convert to seconds and adjust amount (subtract 11644473600
+   * seconds)
+   */
+  now = (double) (((int64_t) ftime.dwLowDateTime +
+                   ((int64_t) ftime.dwHighDateTime << 32)) /
+                  10000000.0) -
+        11644473600;
+#endif /* _WIN32 */
+  return now;
+}
+
+double cs_timegm(const struct tm *tm) {
+  /* Month-to-day offset for non-leap-years. */
+  static const int month_day[12] = {0,   31,  59,  90,  120, 151,
+                                    181, 212, 243, 273, 304, 334};
+
+  /* Most of the calculation is easy; leap years are the main difficulty. */
+  int month = tm->tm_mon % 12;
+  int year = tm->tm_year + tm->tm_mon / 12;
+  int year_for_leap;
+  int64_t rt;
+
+  if (month < 0) { /* Negative values % 12 are still negative. */
+    month += 12;
+    --year;
+  }
+
+  /* This is the number of Februaries since 1900. */
+  year_for_leap = (month > 1) ? year + 1 : year;
+
+  rt =
+      tm->tm_sec /* Seconds */
+      +
+      60 *
+          (tm->tm_min /* Minute = 60 seconds */
+           +
+           60 * (tm->tm_hour /* Hour = 60 minutes */
+                 +
+                 24 * (month_day[month] + tm->tm_mday - 1 /* Day = 24 hours */
+                       + 365 * (year - 70)                /* Year = 365 days */
+                       + (year_for_leap - 69) / 4 /* Every 4 years is leap... */
+                       - (year_for_leap - 1) / 100 /* Except centuries... */
+                       + (year_for_leap + 299) / 400))); /* Except 400s. */
+  return rt < 0 ? -1 : (double) rt;
+}

src/common/cs_time.h

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#ifndef CS_COMMON_CS_TIME_H_
+#define CS_COMMON_CS_TIME_H_
+
+#include <time.h>
+
+#include "common/platform.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* Sub-second granularity time(). */
+double cs_time(void);
+
+/*
+ * Similar to (non-standard) timegm, converts broken-down time into the number
+ * of seconds since Unix Epoch.
+ */
+double cs_timegm(const struct tm *tm);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* CS_COMMON_CS_TIME_H_ */

src/common/mg_mem.h

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#ifndef CS_COMMON_MG_MEM_H_
+#define CS_COMMON_MG_MEM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef MG_MALLOC
+#define MG_MALLOC malloc
+#endif
+
+#ifndef MG_CALLOC
+#define MG_CALLOC calloc
+#endif
+
+#ifndef MG_REALLOC
+#define MG_REALLOC realloc
+#endif
+
+#ifndef MG_FREE
+#define MG_FREE free
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CS_COMMON_MG_MEM_H_ */

src/common/platform.h

+#ifndef CS_COMMON_PLATFORM_H_
+#define CS_COMMON_PLATFORM_H_
+
+/*
+ * For the "custom" platform, includes and dependencies can be
+ * provided through mg_locals.h.
+ */
+#define CS_P_CUSTOM 0
+#define CS_P_UNIX 1
+#define CS_P_WINDOWS 2
+#define CS_P_ESP32 15
+#define CS_P_ESP8266 3
+#define CS_P_CC3100 6
+#define CS_P_CC3200 4
+#define CS_P_CC3220 17
+#define CS_P_MSP432 5
+#define CS_P_TM4C129 14
+#define CS_P_MBED 7
+#define CS_P_WINCE 8
+#define CS_P_NXP_LPC 13
+#define CS_P_NXP_KINETIS 9
+#define CS_P_NRF51 12
+#define CS_P_NRF52 10
+#define CS_P_PIC32 11
+#define CS_P_STM32 16
+/* Next id: 18 */
+
+/* If not specified explicitly, we guess platform by defines. */
+#ifndef CS_PLATFORM
+
+#if defined(TARGET_IS_MSP432P4XX) || defined(__MSP432P401R__)
+#define CS_PLATFORM CS_P_MSP432
+#elif defined(cc3200) || defined(TARGET_IS_CC3200)
+#define CS_PLATFORM CS_P_CC3200
+#elif defined(cc3220) || defined(TARGET_IS_CC3220)
+#define CS_PLATFORM CS_P_CC3220
+#elif defined(__unix__) || defined(__APPLE__)
+#define CS_PLATFORM CS_P_UNIX
+#elif defined(WINCE)
+#define CS_PLATFORM CS_P_WINCE
+#elif defined(_WIN32)
+#define CS_PLATFORM CS_P_WINDOWS
+#elif defined(__MBED__)
+#define CS_PLATFORM CS_P_MBED
+#elif defined(__USE_LPCOPEN)
+#define CS_PLATFORM CS_P_NXP_LPC
+#elif defined(FRDM_K64F) || defined(FREEDOM)
+#define CS_PLATFORM CS_P_NXP_KINETIS
+#elif defined(PIC32)
+#define CS_PLATFORM CS_P_PIC32
+#elif defined(ESP_PLATFORM)
+#define CS_PLATFORM CS_P_ESP32
+#elif defined(ICACHE_FLASH)
+#define CS_PLATFORM CS_P_ESP8266
+#elif defined(TARGET_IS_TM4C129_RA0) || defined(TARGET_IS_TM4C129_RA1) || \
+    defined(TARGET_IS_TM4C129_RA2)
+#define CS_PLATFORM CS_P_TM4C129
+#elif defined(STM32)
+#define CS_PLATFORM CS_P_STM32
+#endif
+
+#ifndef CS_PLATFORM
+#error "CS_PLATFORM is not specified and we couldn't guess it."
+#endif
+
+#endif /* !defined(CS_PLATFORM) */
+
+#define MG_NET_IF_SOCKET 1
+#define MG_NET_IF_SIMPLELINK 2
+#define MG_NET_IF_LWIP_LOW_LEVEL 3
+#define MG_NET_IF_PIC32 4
+
+#define MG_SSL_IF_OPENSSL 1
+#define MG_SSL_IF_MBEDTLS 2
+#define MG_SSL_IF_SIMPLELINK 3
+
+#include "common/platforms/platform_unix.h"
+#include "common/platforms/platform_windows.h"
+#include "common/platforms/platform_esp32.h"
+#include "common/platforms/platform_esp8266.h"
+#include "common/platforms/platform_cc3100.h"
+#include "common/platforms/platform_cc3200.h"
+#include "common/platforms/platform_cc3220.h"
+#include "common/platforms/platform_mbed.h"
+#include "common/platforms/platform_nrf51.h"
+#include "common/platforms/platform_nrf52.h"
+#include "common/platforms/platform_wince.h"
+#include "common/platforms/platform_nxp_lpc.h"
+#include "common/platforms/platform_nxp_kinetis.h"
+#include "common/platforms/platform_pic32.h"
+#include "common/platforms/platform_stm32.h"
+
+/* Common stuff */
+
+#if !defined(WEAK)
+#if (defined(__GNUC__) || defined(__TI_COMPILER_VERSION__)) && !defined(_WIN32)
+#define WEAK __attribute__((weak))
+#else
+#define WEAK
+#endif
+#endif
+
+#ifdef __GNUC__
+#define NORETURN __attribute__((noreturn))
+#define NOINLINE __attribute__((noinline))
+#define WARN_UNUSED_RESULT __attribute__((warn_unused_result))
+#define NOINSTR __attribute__((no_instrument_function))
+#define DO_NOT_WARN_UNUSED __attribute__((unused))
+#else
+#define NORETURN
+#define NOINLINE
+#define WARN_UNUSED_RESULT
+#define NOINSTR
+#define DO_NOT_WARN_UNUSED
+#endif /* __GNUC__ */
+
+#ifndef ARRAY_SIZE
+#define ARRAY_SIZE(array) (sizeof(array) / sizeof(array[0]))
+#endif
+
+#endif /* CS_COMMON_PLATFORM_H_ */

src/common/platforms/arm/arm_exc.c

+/*
+ * Copyright (c) 2014-2017 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "FreeRTOS.h"
+
+#include "common/platform.h"
+
+#include "mgos_core_dump.h"
+#include "mgos_hal.h"
+
+struct arm_exc_frame {
+  uint32_t r0;
+  uint32_t r1;
+  uint32_t r2;
+  uint32_t r3;
+  uint32_t r12;
+  uint32_t lr;
+  uint32_t pc;
+  uint32_t xpsr;
+#ifdef ARM_HAVE_FPU
+  uint32_t s[16];
+  uint32_t fpscr;
+  uint32_t reserved;
+#endif
+} __attribute__((packed));
+
+struct arm_gdb_reg_file {
+  uint32_t r[13];
+  uint32_t sp;
+  uint32_t lr;
+  uint32_t pc;
+  uint32_t cpsr;
+  uint64_t d[16];
+  uint32_t fpscr;
+} __attribute__((packed));
+
+#if ARM_HAVE_FPU
+static void save_s16_s31(uint32_t *dst) {
+  __asm volatile(
+      "\
+      vmov r1, s16\n str  r1, [%0, 0]\n\
+      vmov r1, s17\n str  r1, [%0, 4]\n\
+      vmov r1, s18\n str  r1, [%0, 8]\n\
+      vmov r1, s19\n str  r1, [%0, 12]\n\
+      vmov r1, s20\n str  r1, [%0, 16]\n\
+      vmov r1, s21\n str  r1, [%0, 20]\n\
+      vmov r1, s22\n str  r1, [%0, 24]\n\
+      vmov r1, s23\n str  r1, [%0, 28]\n\
+      vmov r1, s24\n str  r1, [%0, 32]\n\
+      vmov r1, s25\n str  r1, [%0, 36]\n\
+      vmov r1, s26\n str  r1, [%0, 40]\n\
+      vmov r1, s27\n str  r1, [%0, 44]\n\
+      vmov r1, s28\n str  r1, [%0, 48]\n\
+      vmov r1, s29\n str  r1, [%0, 52]\n\
+      vmov r1, s30\n str  r1, [%0, 56]\n\
+      vmov r1, s31\n str  r1, [%0, 60]\n\
+      "
+      :
+      : "r"(dst)
+      : "r1");
+}
+
+static void print_fpu_regs(const uint32_t *regs, int off, int n) {
+  for (int i = 0, j = off; i < n; i++, j++) {
+    if (j % 4 == 0) mgos_cd_putc('\n');
+    mgos_cd_printf("  S%d: %s0x%08lx", j, (j < 10 ? " " : ""), regs[i]);
+  }
+}
+#endif
+
+void arm_exc_handler_bottom(uint8_t isr_no, struct arm_exc_frame *ef,
+                            struct arm_gdb_reg_file *rf) {
+  char buf[8];
+  const char *name;
+  portDISABLE_INTERRUPTS();
+  switch (isr_no) {
+    case 0:
+      name = "ThreadMode";
+      break;
+
+    case 1:
+    case 7:
+    case 8:
+    case 9:
+    case 10:
+    case 13:
+      name = "Reserved";
+      break;
+
+    case 2:
+      name = "NMI";
+      break;
+    case 3:
+      name = "HardFault";
+      break;
+    case 4:
+      name = "MemManage";
+      break;
+    case 5:
+      name = "BusFault";
+      break;
+    case 6:
+      name = "UsageFault";
+      break;
+    case 11:
+      name = "SVCall";
+      break;
+    case 12:
+      name = "ReservedDebug";
+      break;
+    case 14:
+      name = "PendSV";
+      break;
+    case 15:
+      name = "SysTick";
+      break;
+    default: {
+      sprintf(buf, "IRQ%u", isr_no - 16);
+      name = buf;
+    }
+  }
+  mgos_cd_printf("\n\n--- Exception %u (%s) ---\n", isr_no, name);
+  if (rf != NULL) {
+    mgos_cd_printf("  R0:  0x%08lx  R1:  0x%08lx  R2:  0x%08lx  R3:  0x%08lx\n",
+                   rf->r[0], rf->r[1], rf->r[2], rf->r[3]);
+    mgos_cd_printf("  R4:  0x%08lx  R5:  0x%08lx  R6:  0x%08lx  R7:  0x%08lx\n",
+                   rf->r[4], rf->r[5], rf->r[6], rf->r[7]);
+    mgos_cd_printf("  R8:  0x%08lx  R9:  0x%08lx  R10: 0x%08lx  R11: 0x%08lx\n",
+                   rf->r[8], rf->r[9], rf->r[10], rf->r[11]);
+    mgos_cd_printf("  R12: 0x%08lx  SP:  0x%08lx  LR:  0x%08lx  PC:  0x%08lx\n",
+                   rf->r[12], rf->sp, rf->lr, rf->pc);
+    mgos_cd_printf("  PSR: 0x%08lx\n", rf->cpsr);
+  }
+  memset(rf->d, 0, sizeof(rf->d));
+#if ARM_HAVE_FPU
+  rf->fpscr = ef->fpscr;
+  memcpy((uint8_t *) rf->d, ef->s, sizeof(ef->s));
+  print_fpu_regs((uint32_t *) rf->d, 0, ARRAY_SIZE(ef->s));
+  save_s16_s31(ef->s);
+  memcpy(((uint8_t *) rf->d) + sizeof(ef->s), ef->s, sizeof(ef->s));
+  print_fpu_regs((uint32_t *) (((uint8_t *) rf->d) + sizeof(ef->s)), 16,
+                 ARRAY_SIZE(ef->s));
+  mgos_cd_putc('\n');
+  mgos_cd_printf("FPSCR: 0x%08lx\n", rf->fpscr);
+#else
+  rf->fpscr = 0;
+#endif
+  mgos_cd_emit_header();
+  mgos_cd_emit_section(MGOS_CORE_DUMP_SECTION_REGS, rf, sizeof(*rf));
+  mgos_cd_emit_section("SRAM", (void *) SRAM_BASE_ADDR, SRAM_SIZE);
+  mgos_cd_emit_footer();
+#ifdef MGOS_HALT_ON_EXCEPTION
+  mgos_cd_printf("Halting\n");
+  while (1) {
+    mgos_wdt_feed();
+  }
+#else
+  mgos_cd_printf("Rebooting\n");
+  mgos_dev_system_restart();
+#endif
+}

src/common/platforms/arm/arm_exc_top.S

+/*
+ * Copyright (c) 2014-2017 Cesanta Software Limited
+ * All rights reserved
+ */
+
+.arch armv7e-m
+.syntax unified
+.thumb
+
+/* These are required to satisfy TI linker. */
+.eabi_attribute Tag_ABI_align_needed, 1
+.eabi_attribute Tag_ABI_align_preserved, 1
+
+.global arm_exc_handler_top
+.global arm_exc_handler_bottom
+
+/*
+ * Determines the stack pointer, populates most of the GDB frame 
+ * and hands off to the C routine.
+ */
+.section .text.arm_exc_handler_top
+.type arm_exc_handler_top, %function
+.align 8
+
+arm_exc_handler_top:
+  tst lr, #4
+  ite eq
+  mrseq r1, msp
+  mrsne r1, psp
+  // r1 -> arm_exc_frame prepared for us by the CPU
+#if ARM_HAVE_FPU
+  add r0, r1, #104  // sizeof(arm_exc_frame)
+  sub sp, #328      // sizeof(arm_gdb_reg_file)
+#else
+  add r0, r1, #32   // sizeof(arm_exc_frame)
+  sub sp, #328      // sizeof(arm_gdb_reg_file)
+#endif
+  mov r2, sp
+  // r0 -> original sp, r2 -> arm_gdb_reg_file to fill
+  // r3 - scratch
+  ldr r3,  [r1, #0]   // r0
+  str r3,  [r2, #0]
+  ldr r3,  [r1, #4]   // r2
+  str r3,  [r2, #4]
+  ldr r3,  [r1, #8]   // r1
+  str r3,  [r2, #8]
+  ldr r3,  [r1, #12]  // r3
+  str r3,  [r2, #12]
+  str r4,  [r2, #16]  // r4
+  str r5,  [r2, #20]  // r5
+  str r6,  [r2, #24]  // r6
+  str r7,  [r2, #28]  // r7
+  str r8,  [r2, #32]  // r8
+  str r9,  [r2, #36]  // r9
+  str r10, [r2, #40]  // r10
+  str r11, [r2, #44]  // r11
+  ldr r3,  [r1, #16]  // r12
+  str r3,  [r2, #48]
+  str r0,  [r2, #52]  // sp
+  ldr r3,  [r1, #20]  // lr
+  str r3,  [r2, #56]
+  ldr r3,  [r1, #24]  // pc
+  str r3,  [r2, #60]
+  ldr r3,  [r1, #28]  // xpsr
+  str r3,  [r2, #64]
+
+  mrs r0, ipsr
+  b arm_exc_handler_bottom
+.size arm_exc_handler_top, . - arm_exc_handler_top

src/common/platforms/cc3200/cc3200.ld

+/*****************************************************************************
+*
+* GCC Linker script for CC3200. Based on TI's example "blinky.ld".
+*
+* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 
+* 
+* 
+*  Redistribution and use in source and binary forms, with or without 
+*  modification, are permitted provided that the following conditions 
+*  are met:
+*
+*    Redistributions of source code must retain the above copyright 
+*    notice, this list of conditions and the following disclaimer.
+*
+*    Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in the 
+*    documentation and/or other materials provided with the   
+*    distribution.
+*
+*    Neither the name of Texas Instruments Incorporated nor the names of
+*    its contributors may be used to endorse or promote products derived
+*    from this software without specific prior written permission.
+*
+*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+******************************************************************************/
+
+ORG = DEFINED(ORG) ? ORG : 0x20004000;
+RAM_SIZE = DEFINED(RAM_SIZE) ? RAM_SIZE : 0x3C000;
+
+MEMORY
+{
+    /* SRAM size of 240KB for cc3200 ES 1.33 device onward */
+    SRAM (rwx) : ORIGIN = ORG, LENGTH = RAM_SIZE
+}
+
+SECTIONS
+{
+    .text :
+    {
+        _text = .;
+        KEEP(*(.intvecs))
+        *(.text*)
+        *(.rodata*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+        . = ALIGN(8);
+        _etext = .;
+    } > SRAM
+
+    .ARM : {
+    __exidx_start = .;
+      *(.ARM.exidx*)
+      __exidx_end = .;
+    } > SRAM
+
+    __init_data = .;
+
+    .data : AT(__init_data)
+    {
+        _data = .;
+        *(.data*)
+        . = ALIGN (8);
+        _edata = .;
+    } > SRAM
+
+    .bss :
+    {
+        _bss = .;
+        *(.bss*)
+        *(COMMON)
+        _ebss = .;
+    } > SRAM
+
+    .heap :
+    {
+        _heap = .;
+        . = . + (LENGTH(SRAM) - SIZEOF(.text) - SIZEOF(.ARM) - SIZEOF(.data) - SIZEOF(.bss));
+        . = ALIGN(8);
+        _eheap = .;
+
+    } > SRAM
+}

src/common/platforms/cc3200/cc3200_libc.c

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#if CS_PLATFORM == CS_P_CC3200
+
+#include "common/mg_mem.h"
+#include <stdio.h>
+#include <string.h>
+
+#ifndef __TI_COMPILER_VERSION__
+#include <reent.h>
+#include <sys/stat.h>
+#include <sys/time.h>
+#include <unistd.h>
+#endif
+
+#include <inc/hw_types.h>
+#include <inc/hw_memmap.h>
+#include <driverlib/prcm.h>
+#include <driverlib/rom.h>
+#include <driverlib/rom_map.h>
+#include <driverlib/uart.h>
+#include <driverlib/utils.h>
+
+#define CONSOLE_UART UARTA0_BASE
+
+#ifdef __TI_COMPILER_VERSION__
+int asprintf(char **strp, const char *fmt, ...) {
+  va_list ap;
+  int len;
+
+  *strp = MG_MALLOC(BUFSIZ);
+  if (*strp == NULL) return -1;
+
+  va_start(ap, fmt);
+  len = vsnprintf(*strp, BUFSIZ, fmt, ap);
+  va_end(ap);
+
+  if (len > 0) {
+    *strp = MG_REALLOC(*strp, len + 1);
+    if (*strp == NULL) return -1;
+  }
+
+  if (len >= BUFSIZ) {
+    va_start(ap, fmt);
+    len = vsnprintf(*strp, len + 1, fmt, ap);
+    va_end(ap);
+  }
+
+  return len;
+}
+
+#if MG_TI_NO_HOST_INTERFACE
+time_t HOSTtime() {
+  struct timeval tp;
+  gettimeofday(&tp, NULL);
+  return tp.tv_sec;
+}
+#endif
+
+#endif /* __TI_COMPILER_VERSION__ */
+
+void fprint_str(FILE *fp, const char *str) {
+  while (*str != '\0') {
+    if (*str == '\n') MAP_UARTCharPut(CONSOLE_UART, '\r');
+    MAP_UARTCharPut(CONSOLE_UART, *str++);
+  }
+}
+
+void _exit(int status) {
+  fprint_str(stderr, "_exit\n");
+  /* cause an unaligned access exception, that will drop you into gdb */
+  *(int *) 1 = status;
+  while (1)
+    ; /* avoid gcc warning because stdlib abort() has noreturn attribute */
+}
+
+void _not_implemented(const char *what) {
+  fprint_str(stderr, what);
+  fprint_str(stderr, " is not implemented\n");
+  _exit(42);
+}
+
+int _kill(int pid, int sig) {
+  (void) pid;
+  (void) sig;
+  _not_implemented("_kill");
+  return -1;
+}
+
+int _getpid() {
+  fprint_str(stderr, "_getpid is not implemented\n");
+  return 42;
+}
+
+int _isatty(int fd) {
+  /* 0, 1 and 2 are TTYs. */
+  return fd < 2;
+}
+
+#endif /* CS_PLATFORM == CS_P_CC3200 */

src/common/platforms/cc3200/cc3200v1p32.cmd

+//*****************************************************************************
+// cc3200v1p32.cmd
+//
+// CCS linker configuration file for cc3200 ES 1.32.
+//
+// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 
+// 
+// 
+//  Redistribution and use in source and binary forms, with or without 
+//  modification, are permitted provided that the following conditions 
+//  are met:
+//
+//    Redistributions of source code must retain the above copyright 
+//    notice, this list of conditions and the following disclaimer.
+//
+//    Redistributions in binary form must reproduce the above copyright
+//    notice, this list of conditions and the following disclaimer in the 
+//    documentation and/or other materials provided with the   
+//    distribution.
+//
+//    Neither the name of Texas Instruments Incorporated nor the names of
+//    its contributors may be used to endorse or promote products derived
+//    from this software without specific prior written permission.
+//
+//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+
+
+--retain=g_pfnVectors
+
+//*****************************************************************************
+// The following command line options are set as part of the CCS project.  
+// If you are building using the command line, or for some reason want to    
+// define them here, you can uncomment and modify these lines as needed.     
+// If you are using CCS for building, it is probably better to make any such 
+// modifications in your CCS project and leave this file alone.              
+//*****************************************************************************
+
+
+//*****************************************************************************
+// The starting address of the application.  Normally the interrupt vectors  
+// must be located at the beginning of the application.                      
+//*****************************************************************************
+#define RAM_BASE 0x20004000
+
+/* System memory map */
+
+MEMORY
+{
+    /* Application uses internal RAM for program and data */
+    SRAM_CODE (RWX) : origin = 0x20004000, length = 0x2F000
+    SRAM_DATA (RWX) : origin = 0x20033000, length = 0xD000
+}
+
+/* Section allocation in memory */
+
+SECTIONS
+{
+    .intvecs:   > RAM_BASE
+    .init_array : > SRAM_CODE
+    .vtable :   > SRAM_CODE
+    .text   :   > SRAM_CODE
+    .const  :   > SRAM_CODE
+    .cinit  :   > SRAM_CODE
+    .pinit  :   > SRAM_CODE
+    .data   :   > SRAM_DATA
+    .bss    :   > SRAM_DATA
+    .sysmem :   > SRAM_DATA
+    .stack  :   > SRAM_DATA(HIGH)
+}
+

src/common/platforms/cc3200/gcc.mk

+APP_LDFLAGS ?=
+CC_WRAPPER ?=
+GENFILES_LIST ?=
+CC = arm-none-eabi-gcc
+CXX = arm-none-eabi-g++
+AR = arm-none-eabi-ar
+NM = arm-none-eabi-nm
+
+IPATH += $(SDK_PATH)/third_party/FreeRTOS/source/portable/GCC/ARM_CM4
+VPATH += $(SDK_PATH)/third_party/FreeRTOS/source/portable/GCC/ARM_CM4
+
+C_CXX_FLAGS = -mthumb -mcpu=cortex-m4 -ffunction-sections -fdata-sections \
+              -MD -Os -ggdb -Wall -Werror -Dgcc
+CFLAGS += -std=c99 $(C_CXX_FLAGS)
+CXXFLAGS += -std=g++11 $(C_CXX_FLAGS)
+
+AR = arm-none-eabi-ar
+LD = arm-none-eabi-ld
+OBJCOPY = arm-none-eabi-objcopy
+LIBGCC := ${shell ${CC} -mthumb ${CFLAGS} -print-libgcc-file-name}
+LIBC := ${shell ${CC} ${CFLAGS} -print-file-name=libc.a}
+LIBM := ${shell ${CC} ${CFLAGS} -print-file-name=libm.a}
+
+# Disable certain warnings on SDK sources, we have no control over them anyway.
+# We also force-include platform.h which resolves some symbol conflicts
+# between system includes and simplelink.h
+$(SDK_OBJS): CFLAGS += -Wno-missing-braces -Wno-strict-aliasing -Wno-parentheses -Wno-unused-variable -Wno-builtin-macro-redefined
+$(SDK_OBJS): CFLAGS += -include common/platform.h
+
+# cc flags,file
+define cc
+	$(vecho) "GCC   $2 -> $@"
+	$(Q) $(CC_WRAPPER) $(CC) -c $1 -o $@ $2
+endef
+define cxx
+	$(vecho) "G++   $2 -> $@"
+	$(Q) $(CC_WRAPPER) $(CXX) -c $1 -o $@ $2
+endef
+
+# ar files
+define ar
+	$(vecho) "AR    $@"
+	$(Q) $(AR) cru $@ $1
+endef
+
+# link script,flags,objs
+define link
+	$(vecho) "LD    $@"
+	$(Q) $(CC_WRAPPER) $(LD) \
+	  --gc-sections -o $@ -T $1 $2 $3 \
+	  $(LIBM) $(LIBC) $(LIBGCC)
+endef

src/common/platforms/cc3200/ti.mk

+IPATH += $(SDK_PATH)/third_party/FreeRTOS/source/portable/CCS/ARM_CM3
+VPATH += $(SDK_PATH)/third_party/FreeRTOS/source/portable/CCS/ARM_CM3
+
+CC_WRAPPER ?=
+CC = $(TOOLCHAIN)/bin/armcl
+AR = $(TOOLCHAIN)/bin/armar
+NM = nm
+GENFILES_LIST ?=
+
+C_CXX_FLAGS = -Dccs -I$(TOOLCHAIN)/include
+TI_C_CXX_FLAGS = -mv7M4 --little_endian --code_state=16 --float_support=vfplib --abi=eabi \
+                 -O4 --opt_for_speed=0 --unaligned_access=on --small_enum \
+                 --gen_func_subsections=on --diag_wrap=off --display_error_number \
+                 --emit_warnings_as_errors
+CFLAGS += --c99 $(TI_C_CXX_FLAGS) $(C_CXX_FLAGS)
+CXXFLAGS += $(TI_C_CXX_FLAGS) $(C_CXX_FLAGS)
+
+# cc flags,file
+define cc
+	$(vecho) "TICC  $2 -> $@"
+	$(Q) $(CC_WRAPPER) $(CC) -c --preproc_with_compile -ppd=$@.d $1 --output_file=$@ $2
+endef
+define cxx
+	$(vecho) "TICXX $2 -> $@"
+	$(Q) $(CC_WRAPPER) $(CC) -c --preproc_with_compile -ppd=$@.d $1 --output_file=$@ $2
+endef
+
+# asm flags,file
+define asm
+	$(vecho) "TIASM $2 -> $@"
+	$(Q) $(CC_WRAPPER) $(CC) -c $1 --output_file=$@ $2
+endef
+
+# ar files
+define ar
+	$(vecho) "TIAR  $@"
+	$(Q) $(AR) qru $@ $1
+endef
+
+# link script,flags,objs
+define link
+	$(vecho) "TILD  $@"
+	$(Q) $(CC_WRAPPER) $(CC) \
+	  -mv7M4 --code_state=16 --float_support=vfplib --abi=eabi --little_endian \
+	  --run_linker \
+	  --generate_dead_funcs_list=$@.garbage.xml \
+	  -i $(TOOLCHAIN)/lib \
+	  --reread_libs --warn_sections --display_error_number \
+	  --unused_section_elimination=on \
+	  -o $@ --map_file=$@.map --xml_link_info=$@.map.xml \
+	  $2 $1 $3
+endef

src/common/platforms/esp/slip.c

+#include "rom_functions.h"
+
+void SLIP_send(uint8_t *pkt, uint32_t size) {
+  send_packet(pkt, size);
+}
+
+uint32_t SLIP_recv(void *pkt, uint32_t max_len) {
+  uint8_t c;
+  uint32_t len = 0;
+  uint8_t *p = (uint8_t *) pkt;
+  do {
+    c = uart_rx_one_char_block();
+  } while (c != '\xc0');
+  while (len < max_len) {
+    c = uart_rx_one_char_block();
+    if (c == '\xc0') return len;
+    if (c == '\xdb') {
+      c = uart_rx_one_char_block();
+      if (c == '\xdc') {
+        c = '\xc0';
+      } else if (c == '\xdd') {
+        c = '\xdb';
+      } else {
+        len = 0;
+        break; /* Bad esc sequence. */
+      }
+    }
+    *p++ = c;
+    len++;
+  }
+  do {
+    c = uart_rx_one_char_block();
+  } while (c != '\xc0');
+  return len;
+}

src/common/platforms/esp/slip.h

+#ifndef CS_COMMON_PLATFORMS_ESP8266_STUBS_SLIP_H_
+#define CS_COMMON_PLATFORMS_ESP8266_STUBS_SLIP_H_
+
+#include <inttypes.h>
+
+void SLIP_send(const void *pkt, uint32_t size);
+uint32_t SLIP_recv(void *pkt, uint32_t max_len);
+
+#endif /* CS_COMMON_PLATFORMS_ESP8266_STUBS_SLIP_H_ */

src/common/platforms/esp/stub_flasher.h

+#ifndef CS_COMMON_PLATFORMS_ESP8266_STUBS_STUB_FLASHER_H_
+#define CS_COMMON_PLATFORMS_ESP8266_STUBS_STUB_FLASHER_H_
+
+enum stub_cmd {
+  /*
+   * Write to the SPI flash.
+   *
+   * Args: addr, len, erase; addr and len must be SECTOR_SIZE-aligned.
+   *       If erase != 0, perform erase before writing.
+   * Input: Stream of data to be written, note: no SLIP encapsulation here.
+   * Output: SLIP packets with number of bytes written after every write.
+   *         This can (and should) be used for flow control. Flasher will
+   *         write in 1K chunks but will buffer up to 4K of data
+   *         Use this feedback to keep buffer above 1K but below 4K.
+   *         Final packet will contain MD5 digest of the data written.
+   */
+  CMD_FLASH_WRITE = 1,
+
+  /*
+   * Read from the SPI flash.
+   *
+   * Args: addr, len, block_size; no alignment requirements, block_size <= 4K.
+   * Input: None.
+   * Output: Packets of up to block_size with data. An acknowledgement is
+   *expected
+   *         after every packet, in the form of a packet with total number of
+   *         bytes received so far.
+   *         Last packet is the MD5 digest of the data sent.
+   *
+   * Note: No flow control is performed, it is assumed that the host can cope
+   * with the inbound stream.
+   */
+  CMD_FLASH_READ = 2,
+
+  /*
+   * Compute MD5 digest of the specified flash region.
+   *
+   * Args: addr, len, digest_block_size; no alignment requirements.
+   * Input: None.
+   * Output: If block digests are not enabled (digest_block_size == 0),
+   *         only overall digest is produced.
+   *         Otherwise, there will be a separate digest for each block,
+   *         the remainder (if any) and the overall digest at the end.
+   */
+  CMD_FLASH_DIGEST = 3,
+
+  /*
+   * Read flash chip ID.
+   * This is the JEDEC ID, containinf manufactirer, SPI mode and capacity.
+   *
+   * Args: None.
+   * Input: None.
+   * Output: 32 bit chip id (only 24 bits are meaningful).
+   */
+  CMD_FLASH_READ_CHIP_ID = 4,
+
+  /*
+   * Zap the whole chip at once.
+   *
+   * Args: None.
+   * Input: None.
+   * Output: None.
+   */
+  CMD_FLASH_ERASE_CHIP = 5,
+
+  /*
+   * Boots the firmware from flash.
+   *
+   * Args: None.
+   * Input: None.
+   * Output: None.
+   */
+  CMD_BOOT_FW = 6,
+
+  /*
+   * Reboot the CPU.
+   * Since strapping settings are not reset, this will reboot into whatever mode
+   * got us here, most likely UART loader.
+   *
+   * Args: None.
+   * Input: None.
+   * Output: None.
+   */
+  CMD_REBOOT = 7,
+
+  /*
+   * Echo the arguments back to the host.
+   *
+   * Args: variable.
+   * Input: None.
+   * Output: arguments.
+   */
+  CMD_ECHO = 8,
+};
+
+#endif /* CS_COMMON_PLATFORMS_ESP8266_STUBS_STUB_FLASHER_H_ */

src/common/platforms/esp31/rom/.gitattributes

+rom.bin -nodiff

src/common/platforms/esp31/rom/disasm.sh

+#!/bin/bash
+
+xtensa-esp108-elf-gcc -Wl,-N,-Ttext,0x40000000 -nostdlib rom.S -o rom.elf && \
+  xtensa-esp108-elf-objdump -d rom.elf > ESP31B_ROM.txt

src/common/platforms/esp31/rom/notes.c

+/* Just some notes scribbled while disassembling */
+
+/*
+ * RTC = 0x60008000
+ * RTC+0x18: ??c????? ???????? ???????? ????????
+ * RTC+0x34: ???????? ??bbbbbb bbbb???? ??aaaaaa
+ */
+int _X_get_rst_cause(void) {
+  int ret;
+  int a = GET_PERI_REG_BITS(RTC_STATE1, 6, 0);
+  if (a == 5) {
+    int b = (RTC_STATE1 >> 12) && 0xfff;
+    if (b != 1) {
+      ret = (b == 8 ? a : 0);
+    } else {
+      ret = 20;
+    }
+  } else {
+    ret = a;
+  }
+  CLEAR_PERI_REG_MASK(RTC_STATE0, RTC_CNTL_SLP_WAKEUP);
+  return ret;
+}
+
+/*
+ * RTC = 0x60008000
+ * RTC+0x38: ???????? ???????? ???????? ??cccccc
+ * RTC+0x74: ???????? ???????? ???????? dddddddd
+ * RTC+0x80: ???????? ??????a? ???b???? ????????
+ */
+void main(void) {
+  uint32_t rst_cause = _X_get_rst_cause();
+  CLEAR_PERI_REG_MASK(RTC+0x80, BIT(17));     // a
+  SET_PERI_REG_MASK(RTC+0x80, BIT(12));       // b
+  uint32_t boot_mode = GET_PERI_REG_BITS(GPIO_STRAP, 6, 0);  // c
+  if (boot_mode & (BIT(5) | BIT(4)) == (BIT(5) | BIT(4)) || boot_mode == 24 || boot_mode == 26) {
+    CLEAR_PERI_REG_MASK(RTC+0x74, 0xff);
+  }
+  if (boot_mode & (BIT(5) | BIT(4)) == BIT(5)) {
+    CLEAR_PERI_REG_MASK(RTC+0x94, BIT(31));
+    CLEAR_PERI_REG_MASK(RTC+0x98, BIT(31));
+    CLEAR_PERI_REG_MASK(RTC+0x9c, BIT(31));
+    CLEAR_PERI_REG_MASK(RTC+0xa0, BIT(31));
+    CLEAR_PERI_REG_MASK(RTC+0xa4, BIT(31));
+    CLEAR_PERI_REG_MASK(RTC+0xa8, BIT(31));
+    CLEAR_PERI_REG_MASK(RTC+0xac, BIT(31));
+  }
+  if (boot_mode & (BIT(5) | BIT(3)) == 0) {
+    // ... 1405
+  }
+  CLEAR_PERI_REG_MASK(RTC+0x74, 0xff);
+  _X_uart_attach();
+  _X_uart_init(0);
+  // GPIO_STRAP ...
+  ets_printf(boot_banner, fw_build, rst_cause, boot_mode);
+  // rst_cause
+  if (rst_cause == 1 || rst_cause == 2) {
+    
+  } else {
+    // ...
+  }
+  ets_printf("%s %u", "ets_main.c", 305);
+  while(1) {}
+}
+
+/*
+ * GPIO strap mapping:
+ *
+ * 0011 1111 1011 0011
+ *   || |||| |||| ||||
+ *   || |||| |||| |||`- IO5
+ *   || |||| |||| ||`-- IO15
+ *   || |||| |||| |`--- IO4
+ *   || |||| |||| `---- IO2
+ *   || |||| |||`------ ?
+ *   || |||| ||`------- IO0
+ *   || |||| |`-------- IO12
+ *   || |||| `--------- ?
+ *   || |||`----------- CLK
+ *   || ||`------------ ?
+ *   || |`------------- SD0
+ *   || `-------------- SD1
+ *   |`---------------- ? SD2
+ *   `----------------- SD3
+ */
+
+struct uartdev {
+  uint32_t baud_rate;  // 0
+  uint32_t ud4;
+  uint32_t ud8;
+  uint32_t ud12;
+  uint32_t ud16;
+  uint32_t ud20;
+  uint8_t ud24;
+  uint8_t ud25;
+  uint32_t ud28;
+  uint32_t ud32;
+  uint32_t ud36;
+  uint8_t ud40;
+  uint32_t ud48;
+  uint32_t ud52;
+};
+
+void _X_uart_attach(void) {
+  // zero uartdev
+  uartdev.baud_rate = 115200;
+  _X_xtos_ints_off(1 << ETS_UART_INUM);
+  // INTR_MAP_REG_C
+  // 11111111 11111111 11111100 00011111 &
+  // 00000000 00000000 00000000 10100000 |
+  // PRODPORT_INTR_MAP_13 -> 5 = ETS_UART_INUM
+  // 11111111 11111111 10000011 11111111 &
+  // 00000000 00000000 00010100 11111111 |
+  // PRODPORT_INTR_MAP_14 -> 5 = ETS_UART_INUM
+  _xtos_set_interrupt_handler_arg(ETS_UART_INUM, uart_int_handler, _c_0x3fffdb2c_uart_int_handler_arg);
+}
+
+void _X_uart_init(uint32_t a) {
+  // GPIO_FUNC_IN_SEL3
+  // xx999999 88888877 77776666 66555555
+  // 11111111 11111100 00001111 11111111 = 0xfffc0fff
+  // 00000000 00000000 10010000 00000000 = 0x00009000
+  // GPIO17 func => 9
+  // 00000000 00000010 00000000 00000000
+  uart_div_modify(13000000 / uartdev.baud_rate);
+  // ...
+}
+
+struct _st_0x3fffdc90 {
+};
+
+struct _st_0x3fffdf70 {
+  void *fp1;  // 20
+  void *fp2;  // 24
+  uint32_t d28;
+  uint32_t d32;
+  uint32_t d36;
+  struct _st_0x3fffdc90 *st;  // 44
+} stdf70;
+
+void _X_slc_init_attach(void *fp1, void *fp2, struct _st_0x3fffdc90 *st, uint32_t gpio_mode) {
+  stdf70.fp1 = fp1;
+  stdf70.fp2 = fp2;
+  stdf70.st = st;
+  d28 = d32 = d36 = 0;
+  SET_PERI_REG_MASK(WIFI_RST_EN, PRODPORT_SDIO_RST);
+  CLEAR_PERI_REG_MASK(WIFI_RST_EN, PRODPORT_SDIO_RST);
+  if (gpio_mode == 4) {
+    SET_PERI_REG((READ_PERI_REG(PERIPHS_HINF_BASEADDR+4) & 0xf0000000) | 0x01110013);
+  } else {
+    SET_PERI_REG((READ_PERI_REG(PERIPHS_HINF_BASEADDR+4) & 0xf0000000) | 0x02320017);
+  }
+  SET_PERI_REG(PERIPHS_HINF_BASEADDR, 0x11116666);
+  _X_slc_set_host_io_max_window();
+  ...
+}
+
+#define SLC_TOKEN1 (PERIPHS_SLC_BASEADDR + 0x54)
+#define SLC_BRIDGE_CONF (PERIPHS_SLC_BASEADDR + 0x74)
+
+void _X_slc_set_host_io_max_window(void) {
+  SET_PERI_REG(SLC_BRIDGE_CONF, (READ_PERI_REG(SLC_BRIDGE_CONF) & 0xfffff0c0) | 0x720);
+}

src/common/platforms/esp31/rom/rom.S

+.text
+.org 0
+.globl _start
+
+// xtensa-esp108-elf-gcc -Wl,-N,-Ttext,0x40000000 -nostdlib rom.S -o rom.elf
+
+here = .
+#define PROVIDE(name, addr) name = here + addr - 0x40000000
+
+#include "rom_functions.S"
+
+.text
+
+_start:
+.incbin "rom.bin"
+_end:

src/common/platforms/esp31/rom/rom_functions.S

+// These come from linker script
+
+PROVIDE ( Cache_Read_Disable , 0x4000444c );
+PROVIDE ( Cache_Read_Enable , 0x4000438c );
+
+PROVIDE ( ets_delay_us , 0x40002db4 );
+
+PROVIDE ( bzero , 0x40002a54 );
+
+PROVIDE ( memcmp , 0x400068ec );
+PROVIDE ( memcpy , 0x40006974 );
+PROVIDE ( memmove , 0x40006a6c );
+PROVIDE ( memset , 0x40006be4 );
+
+PROVIDE ( strcmp , 0x40005bb8 );
+PROVIDE ( strcpy , 0x40005cdc );
+PROVIDE ( strlen , 0x40005d6c );
+PROVIDE ( strncmp , 0x40005dd0 );
+PROVIDE ( strncpy , 0x40005e90 );
+PROVIDE ( strstr , 0x40005f6c );
+
+PROVIDE ( ets_install_putc1 , 0x40002774 );
+PROVIDE ( ets_printf , 0x40002804 );
+PROVIDE ( ets_putc , 0x40002b14 );
+
+PROVIDE ( ets_str2macaddr , 0x40002a64 );
+
+PROVIDE ( gpio_output_set , 0x400049d8 );
+PROVIDE ( gpio_output_set_high , 0x400049f8 );
+
+PROVIDE ( ets_get_cpu_frequency , 0x40002de8 );
+PROVIDE ( ets_update_cpu_frequency , 0x40002ddc );
+
+PROVIDE ( lldesc_build_chain , 0x40004c8c );
+
+PROVIDE ( multofup , 0x400068a0 );
+PROVIDE ( roundup2 , 0x40006890 );
+
+PROVIDE (software_reset_cpu , 0x40002998 );
+
+PROVIDE ( SPIEraseSector , 0x40004708 );
+PROVIDE ( SPIRead , 0x40004898 );
+PROVIDE ( SPIWrite , 0x40004738 );
+
+PROVIDE ( uart_div_modify , 0x400034e8 );
+PROVIDE ( uart_tx_one_char , 0x4000362c );
+
+PROVIDE ( __divsi3 , 0x40006888 );
+PROVIDE ( __udivdi3 , 0x40006c30 );
+PROVIDE ( __umoddi3 , 0x40006e64 );
+
+PROVIDE ( _xtos_set_intlevel , 0x40006670 );
+
+// These have been reverse-engineered.
+
+PROVIDE(_XX_Vec40, 0x40000040)
+PROVIDE(_XX_ExcVec50, 0x40000050)
+PROVIDE(_XX_ExcVec80, 0x40000080)
+
+PROVIDE(_XX_Vec400, 0x40000300)
+
+PROVIDE(_WindowOverflowHandler, 0x40000100)
+PROVIDE(_WindowUnderflowHandler, 0x40000140)
+
+PROVIDE(_X_ResetVector, 0x40000500)
+
+PROVIDE(_c_stack, 0x40000700)
+PROVIDE(_c_bss_start, 0x40000708)
+PROVIDE(_c_bss_end, 0x4000070c)
+PROVIDE(_c_0x3fffc210, 0x40000734)
+PROVIDE(_c_0x80000000, 0x40000738)
+PROVIDE(_c_0x40000000, 0x40000760)
+PROVIDE(_c_0x7fffffff, 0x40000780)
+PROVIDE(_c_0x00ff0000, 0x40000798)
+
+PROVIDE(_X_start, 0x400007ac)
+
+PROVIDE(_c_0x3fffd820, 0x40000f50)
+PROVIDE(_X_ets_task, 0x40000f54)
+PROVIDE(_XX_unk0f84, 0x40000f84)
+PROVIDE(_XX_unk0f96, 0x40000f98)
+
+PROVIDE(_c_ets_critical_level, 0x400010a4)
+PROVIDE(_X_ets_enter_critical, 0x400010a8)
+PROVIDE(_X_ets_exit_critical, 0x400010bc)
+PROVIDE(_X_ets_exit_critical_and_wait_int, 0x400010d4)
+PROVIDE(_X_ets_isr_attach, 0x400010e8)  // 3 args
+PROVIDE(_X_ets_isr_mask, 0x400010f8)  // 1 arg
+PROVIDE(_X_ets_isr_unmask, 0x40001104)  // 1 arg
+
+PROVIDE(_c_0x3fffda30, 0x40001110)
+PROVIDE(_XX_set_0x3fffda30_0, 0x40001114)
+PROVIDE(_XX_set_0x3fffda30_4, 0x40001120)
+PROVIDE(_c_0xfffdffff, 0x4000112c)
+PROVIDE(_c_0x60003e00, 0x40001130)
+PROVIDE(_c_0x60008200, 0x40001134)
+PROVIDE(_c_0x60007e00, 0x40001138)
+PROVIDE(_c_0x1000, 0x4000113c)
+PROVIDE(_s_fw_build, 0x40001140)
+PROVIDE(_s_boot_banner, 0x40001144)
+PROVIDE(_s_pct_s_pct_u, 0x40001148)
+PROVIDE(_s_ets_main_c, 0x4000114c)
+PROVIDE(_X_main, 0x4000115c)
+
+PROVIDE(_l_strap_0x0xxx, 0x4000125a)
+PROVIDE(_l_strap_init_uart0, 0x40001269)
+PROVIDE(_l_strap_0x0x00, 0x400012e2)
+PROVIDE(_l_boot, 0x400012ea)
+PROVIDE(_l_rst_cause_345, 0x40001336)
+PROVIDE(_l_rst_cause_12, 0x40001342)
+PROVIDE(_l_strap_NxNxxx, 0x40001405)
+PROVIDE(_l_strap_0010xx, 0x4000144c)
+PROVIDE(_l_strap_001000_0x110x, 0x400014b0)
+PROVIDE(_l_strap_0x0x11_loader, 0x400014c9)  // loader
+PROVIDE(_l_strap_0x0x01, 0x400014d4)
+PROVIDE(_l_strap_0x0x10, 0x400014e6)
+PROVIDE(_c_0xffff8fff, 0x400014f0)
+PROVIDE(_c_0x60008e00, 0x400014f4)
+
+PROVIDE(_s_waiting_for_host, 0x4000152c)
+PROVIDE(_s_mem_banner, 0x40001cdc)
+PROVIDE(_c_stack_sentry, 0x40001ce0)
+PROVIDE(_XX_unk153c, 0x4000153c)
+
+PROVIDE(_c_data_end, 0x40001cd8)
+PROVIDE(_c_data_start, 0x40001ce4)
+PROVIDE(_X_print_mem_banner, 0x40001ce8)
+
+PROVIDE(_s_exc_sp_fmt, 0x40001d0c)
+PROVIDE(_s_exc_sf_dump_fmt, 0x40001d10)
+PROVIDE(_s_exc_regs_fmt, 0x40001d14)
+PROVIDE(_X_exc_handler, 0x40001d18)
+
+PROVIDE(_XX_unk1d90, 0x40001d90)
+
+PROVIDE(_X_ets_memset, 0x40001db4)
+PROVIDE(_X_ets_memcpy, 0x40001dc4)
+PROVIDE(_X_ets_memmove, 0x40001dd4)
+PROVIDE(_X_ets_memcmp, 0x40001de4)
+
+PROVIDE(_st_0x3fffda9c, 0x40002150)  // struct
+
+PROVIDE(_X_ets_uart_putc, 0x4000223c)
+PROVIDE(_X_ets_unk225c, 0x4000225c)
+
+PROVIDE(_c_0x4000223c_ets_uart_putc, 0x40002780)
+PROVIDE(_X_ets_install_uart_printf, 0x40002784)
+PROVIDE(_c_0x400027dc, 0x40002790)
+PROVIDE(_X_ets_install_external_printf, 0x40002794)
+PROVIDE(_X_ets_install_putc2, 0x400027b4)
+PROVIDE(_X_ets_get_printf_buf_remain_len, 0x400027c0)
+PROVIDE(_X_ets_reset_printf_buf_len, 0x400027cc)
+PROVIDE(_X_ets_putc, 0x400027dc)
+
+PROVIDE(_c_0xdfffffff, 0x400028d4)
+PROVIDE(_X_get_rst_cause, 0x400028d8)
+PROVIDE(_XX_unk2948, 0x40002948)
+PROVIDE(_l_2970, 0x40002970)
+PROVIDE(_X_sw_sys_rst, 0x4000297c)
+PROVIDE(_c_0x00400000, 0x400029b4)
+PROVIDE(_c_0xffbfffff, 0x400029b8)
+PROVIDE(_XX_apb_bridge_toggle, 0x400029bc)  // turns RTC_CNTL_APB2RTC_BRIDGE_SEL on and off
+PROVIDE(_X_ets_strcpy, 0x400029ec)
+PROVIDE(_X_ets_strncpy, 0x40002a00)
+PROVIDE(_X_ets_strcmp, 0x40002a10)
+PROVIDE(_X_ets_strncmp, 0x40002a24)
+PROVIDE(_X_ets_strlen, 0x40002a34)
+PROVIDE(_X_ets_strstr, 0x40002a40)
+
+PROVIDE(_st_0x3fffdb10_uartdev, 0x40002e4c)  // some struct - uartdev?
+
+PROVIDE(_c_0x3fffdb00, 0x40002e50)
+PROVIDE(_c_0x3fffdb04, 0x40002f64)
+PROVIDE(_XX_unk2e58, 0x40002e58)
+PROVIDE(_X_UartDwnLdProc, 0x40002f6c)
+PROVIDE(_c_0x00001800, 0x400030ec)
+PROVIDE(_X_FlashDwnLdStartMsgProc, 0x400030f0)
+PROVIDE(_XX_unk313c, 0x4000313c)
+PROVIDE(_XX_unk31bc, 0x400031bc)
+PROVIDE(_XX_unk31e4, 0x400031e4)
+PROVIDE(_XX_unk3210, 0x40003210)
+PROVIDE(_XX_unk3240, 0x40003240)
+PROVIDE(_X_MemDwnLdStopReqMsgProc, 0x4000329c)
+PROVIDE(_X_UartConnectProc, 0x400032c4)
+PROVIDE(_X_UartRegWriteProc, 0x400032d4)
+PROVIDE(_X_UartRegReadProc, 0x40003318)
+
+PROVIDE(_c_115200, 0x4000332c)
+PROVIDE(_c_0x3feffe00, 0x40003330)
+PROVIDE(_c_0xffff83ff, 0x40003334)
+PROVIDE(_c_0x00001400, 0x40003338)
+PROVIDE(_c_0x40003728_uart_int_handler, 0x4000333c)
+PROVIDE(_c_0x3fffdb2c_uart_int_handler_arg, 0x40003340)
+PROVIDE(_X_uart_attach, 0x40003344)
+PROVIDE(_XX_uart_set_unk33c0, 0x400033c0)
+PROVIDE(_c_0x5ffffe00, 0x400033cc)
+PROVIDE(_c_0x0000ffff, 0x400033d0)
+PROVIDE(_c_0x000fffff, 0x40003448)
+PROVIDE(_c_0x00060000, 0x400034e0)
+PROVIDE(_c_0xfff9ffff, 0x400034e4)
+
+PROVIDE(_c_0xfffc0fff, 0x40003520)
+PROVIDE(_c_0x00009000, 0x40003524)
+PROVIDE(_c_0x00020000, 0x40003528)
+PROVIDE(_c_13000000, 0x4000352c)
+PROVIDE(_c_0x08000000, 0x40003530)
+PROVIDE(_X_uart_init, 0x40003534)
+PROVIDE(_l_35f4, 0x400035f4)
+PROVIDE(_X_uart_wait_tx_empty, 0x4000369c)
+
+PROVIDE(_X_uart_int_handler, 0x40003728)
+
+PROVIDE(_X_uart_tx_one_char2, 0x40003664)
+
+PROVIDE(_X_send_packet, 0x400037d4)
+PROVIDE(_X_SendMsg, 0x40003828)
+PROVIDE(_X_recv_packet, 0x4000383c)
+PROVIDE(_X_RcvMsg, 0x40003988)
+PROVIDE(_X_uart_rx_readbuff, 0x400039a0)
+
+PROVIDE(_c_0x60004e00, 0x40003a18)
+PROVIDE(_X_SelectSpiFunction, 0x40003a1c)  // 1 arg - SPI number
+PROVIDE(_c_0x60002e00, 0x40003c78)
+PROVIDE(_X_SPI_chip_erase, 0x40003c7c)
+PROVIDE(_c_0x00ffffff, 0x40003cb4)
+PROVIDE(_c_0x01000000, 0x40003cb8)
+PROVIDE(_XX_unk3cbc, 0x40003cbc)
+PROVIDE(_c_0x00800000, 0x40003d00)
+PROVIDE(_c_0x02000000, 0x40003d4c)
+PROVIDE(_XX_unk3e24, 0x40003e24)
+PROVIDE(_X_SPI_read_status, 0x40003efc)
+PROVIDE(_c_0x90000000, 0x40003f48)
+PROVIDE(_c_0x70000035, 0x40003f4c)
+PROVIDE(_c_0x00040000, 0x40003f50)
+PROVIDE(_XX_unk3f54, 0x40003f54)
+PROVIDE(_c_0x04000000, 0x40003fcc)
+PROVIDE(_XX_unk4010, 0x40004010)
+PROVIDE(_X_SPI_write_enable, 0x400041bc)
+PROVIDE(_X_Wait_SPI_Idle, 0x40004208)
+PROVIDE(_l_4228, 0x40004228)
+PROVIDE(_l_4234, 0x40004234)
+PROVIDE(_XX_unk4238, 0x40004238)
+PROVIDE(_X_SPIFlashModeConfig, 0x400042d8)
+PROVIDE(_X_spi_flash_attach, 0x40004370)  // 2 args: SPI num, ???
+PROVIDE(_X_SPIReadModeConfig, 0x40004538)
+
+PROVIDE(_X_SPIEraseArea, 0x400048b4)
+PROVIDE(_XX_unk4940, 0x40004940)
+
+PROVIDE(_st_0x3fffdc90, 0x40004d80)
+PROVIDE(_XX_unk4d88, 0x40004d88)
+PROVIDE(_XX_unk4f6c, 0x40004f6c)
+PROVIDE(_XX_unk4fc8, 0x40004fc8)
+
+PROVIDE(_c_0xbfffffff, 0x40004c80)
+PROVIDE(_c_0xff000fff, 0x40004c88)
+PROVIDE(_XX_unk4f14, 0x40004f14)
+PROVIDE(_s_no_rds, 0x40005008)
+PROVIDE(_XX_unk500c, 0x4000500c)
+
+PROVIDE(_fp_0x40004f6c, 0x40005164)
+PROVIDE(_fp_0x40004fc8, 0x40005168)
+PROVIDE(_X_sip_init_attach, 0x40005170)  // 1 arg, boot_mode?
+PROVIDE(_XX_unk51ac, 0x400051ac)
+PROVIDE(_c_0x60017e00, 0x40005478)
+PROVIDE(_st_0x3fffdf70, 0x400054a4)
+PROVIDE(_c_0x6000ae00, 0x400054b8)
+PROVIDE(_c_0xf0000000, 0x400054bc)
+PROVIDE(_c_0x02320017, 0x400054c0)
+PROVIDE(_c_0x11116666, 0x400054c4)
+PROVIDE(_c_0x01110013, 0x400054e4)
+PROVIDE(_X_slc_init_attach, 0x400054e8)  // 4 args - fp, fp, st, boot_mode; PRODPORT_SDIO_RST
+PROVIDE(_l_slc_boot_mode_4, 0x40005654)
+PROVIDE(_X_slc_enable, 0x40005678)
+PROVIDE(_X_slc_select_tohost_gpio_mode, 0x400056fc)
+PROVIDE(_X_slc_select_tohost_gpio, 0x40005708)
+PROVIDE(_c_0xff300000, 0x40005730)
+PROVIDE(_XX_unk5734, 0x40005734)
+PROVIDE(_XX_unk57b8, 0x400057b8)
+PROVIDE(_XX_unk57f4, 0x400057f4)
+PROVIDE(_XX_unk5848, 0x40005848)
+
+PROVIDE(_c_0xfffff0c0, 0x40005988)
+PROVIDE(_X_slc_set_host_io_max_window, 0x4000598c)
+PROVIDE(_X_slc_init_credit, 0x400059ac)
+PROVIDE(_X_slc_add_credits, 0x400059c4)
+
+PROVIDE(_X_xtos_set_interrupt_handler_arg, 0x400059d8)
+PROVIDE(_X_xtos_set_interrupt_handler, 0x40005a24)
+PROVIDE(_X_xtos_ints_on, 0x40005a34)
+PROVIDE(_X_xtos_ints_off, 0x40005a58)
+
+PROVIDE(_XX_xtos_exc_unk5a80, 0x40005a80)
+PROVIDE(_XX_xtos_exc_unk5b94, 0x40005b94)

src/common/platforms/esp32/rom/.gitattributes

+rom.bin -nodiff
+rom.elf -nodiff

src/common/platforms/esp32/rom/disasm.sh

+#!/bin/bash
+
+xtensa-esp32-elf-gcc -Wl,-N,-Ttext,0x40000000 -nostdlib rom.S -o rom.elf && \
+  xtensa-esp32-elf-objdump -d rom.elf > ESP32_ROM.txt

src/common/platforms/esp32/rom/rom.S

+.text
+.org 0
+.globl _start
+
+// xtensa-esp32-elf-gcc -Wl,-N,-Ttext,0x40000000 -nostdlib rom.S -o rom.elf
+
+here = .
+#define PROVIDE(name, addr) name = here + addr - 0x40000000
+
+#include "rom_functions.S"
+
+PROVIDE ( _x_unk_40061b88, 0x40061b88 )
+PROVIDE ( _x_unk_spi_400622c0, 0x400622c0 )
+PROVIDE ( _c_3ff000c8, 0x40062df0 )
+PROVIDE ( _c_3ff5b024, 0x40062e0c )
+PROVIDE ( _c_3ff5b000, 0x40062e10 )
+PROVIDE ( _c_3ff5b020, 0x40062e14 )
+PROVIDE ( _c_3ff5b028, 0x40062e18 )
+PROVIDE ( _l_40062e90, 0x40062e90 )
+PROVIDE ( _l_SPI_Prepare_Encrypt_Data_loop, 0x40062e34 )
+PROVIDE ( _l_SPI_Prepare_Encrypt_Data_wait, 0x40062e54 )
+PROVIDE ( _l_SPI_Prepare_Encrypt_Data_out, 0x40062e5e )
+
+.text
+
+_start:
+.incbin "rom.bin"
+_end:

src/common/platforms/esp32/stubs/Makefile

+#
+# Copyright (c) 2015 Cesanta Software Limited
+# All rights reserved
+#
+
+STUB = stub_hello.c
+LIBS =
+PARAMS =
+PORT = /dev/ttyUSB0
+
+BUILD_DIR = .build
+COMMON_STUB_DIR = ../../esp
+STUB_ELF = $(BUILD_DIR)/$(patsubst %.c,%.elf,$(notdir $(STUB)))
+STUB_JSON ?= $(BUILD_DIR)/$(patsubst %.c,%.json,$(notdir $(STUB)))
+SDK = $(shell cat ../../../../fw/platforms/esp32/sdk.version)
+XT_CC = xtensa-esp32-elf-gcc
+
+.PHONY: all clean run wrap
+
+all: $(STUB_ELF)
+
+$(STUB_ELF): $(STUB) $(LIBS)
+	@echo "  CC   $^ -> $@"
+	@[ -d $(BUILD_DIR) ] || mkdir $(BUILD_DIR)
+	@docker run --rm -i -v $(CURDIR)/../../../..:/src $(SDK) //bin/bash -c \
+    "cd /src/common/platforms/esp32/stubs && \
+     $(XT_CC) -std=c99 -Wall -Werror -Os -DESP32 \
+         -mtext-section-literals -mlongcalls -nostdlib -fno-builtin \
+         -I. -I/src/common/platforms/esp \
+         -I/opt/Espressif/esp-idf/components/esp32/include \
+         -I/opt/Espressif/esp-idf/components/soc/esp32/include \
+         -L/opt/Espressif/esp-idf -Wl,-static \
+         -ffunction-sections -Wl,--gc-sections \
+         -Tstub.ld -o $@ $^"
+
+wrap: $(STUB_JSON)
+
+$(STUB_JSON): $(STUB_ELF) $(COMMON_STUB_DIR)/esptool.py
+	@echo "  WRAP $< -> $@"
+	@docker run --rm -i -v $(CURDIR)/../../../..:/src $(SDK) //bin/bash -c \
+    "cd /src/common/platforms/esp32/stubs && \
+     $(COMMON_STUB_DIR)/esptool.py wrap_stub $<" > $@
+
+run: $(STUB_JSON)
+	@echo "  RUN  $< $(PARAMS) -> $(PORT)"
+	@docker run --rm -i --privileged -v $(CURDIR)/../../../..:/src $(SDK) //bin/bash -c \
+    "cd /src/common/platforms/esp32/stubs && \
+     $(COMMON_STUB_DIR)/esptool.py --port $(PORT) run_stub $< $(PARAMS)"
+
+clean:
+	@rm -rf $(BUILD_DIR)

src/common/platforms/esp32/stubs/README.md

+This is a ESP boot loader stub development environment.
+
+Code produced in this environment can be loaded and executed
+in the bootloader environment. Usually it is used to implement
+functionality not found in the bootloader.
+
+Stubs can be executed using the `run_stub` command of the modified esptool.py provided.
+`wrap_stub` produces a JSON represenattion of the stub that can later be reused
+or built into other tools.
+
+Example usage:
+  $ make run STUB=stub_flash_size.c PORT=/dev/ttyUSB0
+  $ make run STUB=stub_md5.c PORT=/dev/ttyUSB0 PARAMS="0x11000 10000 1"

src/common/platforms/esp32/stubs/led.c

+/*
+ * Copyright (c) 2014-2017 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#include "soc/gpio_reg.h"
+
+void led_setup(int io) {
+  if (io < 32) {
+    WRITE_PERI_REG(GPIO_ENABLE_W1TS_REG, 1 << io);
+  } else {
+    WRITE_PERI_REG(GPIO_ENABLE1_W1TS_REG, 1 << (io - 32));
+  }
+}
+
+void led_on(int io) {
+  if (io < 32) {
+    WRITE_PERI_REG(GPIO_OUT_W1TS_REG, 1 << io);
+  } else {
+    WRITE_PERI_REG(GPIO_OUT1_W1TS_REG, 1 << (io - 32));
+  }
+}
+
+void led_off(int io) {
+  if (io < 32) {
+    WRITE_PERI_REG(GPIO_OUT_W1TC_REG, 1 << io);
+  } else {
+    WRITE_PERI_REG(GPIO_OUT1_W1TC_REG, 1 << (io - 32));
+  }
+}
+
+void led_toggle(int io) {
+  if (READ_PERI_REG(GPIO_OUT_REG & (1 << io))) {
+    WRITE_PERI_REG(GPIO_OUT_W1TC_REG, 1 << io);
+  } else {
+    WRITE_PERI_REG(GPIO_OUT_W1TS_REG, 1 << io);
+  }
+}

src/common/platforms/esp32/stubs/led.h

+/*
+ * Copyright (c) 2014-2017 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#pragma once
+
+void led_setup(int io);
+void led_on(int io);
+void led_off(int io);
+void led_toggle(int io);

src/common/platforms/esp32/stubs/rom_functions.h

+#ifndef CS_COMMON_PLATFORMS_ESP32_STUBS_ROM_FUNCTIONS_H_
+#define CS_COMMON_PLATFORMS_ESP32_STUBS_ROM_FUNCTIONS_H_
+
+#include "rom/ets_sys.h"
+#include "rom/spi_flash.h"
+#include "rom/md5_hash.h"
+#include "rom/uart.h"
+#include "rom/rtc.h"
+
+#endif /* CS_COMMON_PLATFORMS_ESP32_STUBS_ROM_FUNCTIONS_H_ */

src/common/platforms/esp32/stubs/sdkconfig.h

+#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1

src/common/platforms/esp32/stubs/stub.ld

+/*
+ * Copyright (c) 2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+MEMORY {
+  iram     : org = 0x40090000, len = 0x10000
+  /* DRAM startin at 0x3FFC0000 gets stomped by something before mem_finish
+   * and is thus not suitable for initialized data, but works fine for BSS. */
+  dram_bss : org = 0x3FFC0000, len = 0x10000
+  dram     : org = 0x3FFD0000, len = 0x10000
+}
+
+ENTRY(stub_main)
+
+SECTIONS {
+  .params 0x40090000 : {
+    _params_start = ABSOLUTE(.);
+    *(.params)
+    _params_end = ABSOLUTE(.);
+  } > iram
+
+  .text : ALIGN(4) {
+    _code_start = ABSOLUTE(.);
+    *(.literal)
+    *(.text .text.*)
+  } > iram
+
+  .bss : ALIGN(4) {
+    _bss_start = ABSOLUTE(.);
+    *(.bss)
+    _bss_end = ABSOLUTE(.);
+  } > dram
+
+  .data : ALIGN(4) {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.rodata .rodata.*)
+  } > dram
+}
+
+INCLUDE "components/esp32/ld/esp32.rom.ld"
+INCLUDE "components/esp32/ld/esp32.rom.spiram_incompatible_fns.ld"
+
+PROVIDE(esp_rom_spiflash_attach = 0x40062a6c);
+PROVIDE(esp_rom_spiflash_config_clk = 0x40062bc8);

src/common/platforms/esp32/stubs/stub_hello.c

+/*
+ * Copyright (c) 2015 Cesanta Software Limited
+ * All rights reserved
+ *
+ *
+ * Stub template.
+ */
+
+#include <inttypes.h>
+#include <string.h>
+#include "slip.h"
+
+/* Define the args vector and put it into the ".params" section. */
+uint32_t params[3] __attribute__((section(".params")));
+
+/* Define a function called stub_main. Do not return or reboot.
+ * Use send_packet to communicate to the host. */
+
+const char *hello = "Hello";
+
+static char buf[1024];
+extern uint32_t _bss_start, _bss_end;
+
+void stub_main(void) {
+  uint32_t greeting = 0x4941484f;
+  SLIP_send(&greeting, 4);
+  memset(&_bss_start, 0, (&_bss_end - &_bss_start));
+  buf[1] = 123;
+  SLIP_send(hello, 5);
+  while (1) {
+  }
+}

src/common/platforms/esp32/stubs/uart.c

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#include "uart.h"
+
+#include "rom_functions.h"
+
+void set_baud_rate(uint32_t uart_no, uint32_t baud_rate) {
+  uint32_t master_freq = ets_get_detected_xtal_freq() << 4;
+  master_freq += (baud_rate / 2);
+  uint32_t div = master_freq / baud_rate;
+  uart_div_modify(uart_no, div);
+}

src/common/platforms/esp32/stubs/uart.h

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#ifndef CS_COMMON_PLATFORMS_ESP32_STUBS_UART_H_
+#define CS_COMMON_PLATFORMS_ESP32_STUBS_UART_H_
+
+#include <stdint.h>
+
+void set_baud_rate(uint32_t uart_no, uint32_t baud_rate);
+
+#endif /* CS_COMMON_PLATFORMS_ESP32_STUBS_UART_H_ */

src/common/platforms/esp8266/esp_ssl_krypton.h

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#ifndef CS_COMMON_PLATFORMS_ESP8266_ESP_SSL_KRYPTON_H_
+#define CS_COMMON_PLATFORMS_ESP8266_ESP_SSL_KRYPTON_H_
+
+#include "krypton/krypton.h"
+
+struct mg_connection;
+
+void mg_lwip_ssl_do_hs(struct mg_connection *nc);
+void mg_lwip_ssl_send(struct mg_connection *nc);
+void mg_lwip_ssl_recv(struct mg_connection *nc);
+
+#endif /* CS_COMMON_PLATFORMS_ESP8266_ESP_SSL_KRYPTON_H_ */

src/common/platforms/esp8266/rboot/rboot/rboot.ld

+INCLUDE "eagle.app.v6.ld"
+INCLUDE "rboot_rom.ld"

src/common/platforms/esp8266/rboot/rboot/rboot_rom.ld

+PROVIDE ( ets_delay_us = 0x40002ecc );
+PROVIDE ( ets_memcpy = 0x400018b4 );
+PROVIDE ( ets_memset = 0x400018a4 );
+PROVIDE ( ets_printf = 0x400024cc );
+PROVIDE ( SPIEraseSector = 0x40004a00 );
+PROVIDE ( SPIRead = 0x40004b1c );
+PROVIDE ( SPIWrite = 0x40004a4c );
+PROVIDE ( uart_div_modify = 0x400039d8 );

src/common/platforms/esp8266/rom/.gitattributes

+rom.bin -nodiff
+rom.elf -nodiff