Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Contribute to GitLab
Sign in
Toggle navigation
MeshBCI_electrode
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
MeshBCI
MeshBCI_electrode
Commits
5e9949e8
Commit
5e9949e8
authored
Feb 28, 2017
by
Franco (nextime) Lanza
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
EEG Electrode Board panelization
parent
e22df39c
Changes
5
Expand all
Hide whitespace changes
Inline
Side-by-side
Showing
5 changed files
with
24500 additions
and
35 deletions
+24500
-35
EEG_Electrode_Board.kicad_pcb
EEG_Electrode_Board.kicad_pcb
+142
-18
EEG_Electrode_Board.kicad_pcb-bak
EEG_Electrode_Board.kicad_pcb-bak
+17
-17
EEG_Electrode_Board_europanel.kicad_pcb
EEG_Electrode_Board_europanel.kicad_pcb
+23191
-0
EEG_Electrode_Board_europanel.kicad_pcb-bak
EEG_Electrode_Board_europanel.kicad_pcb-bak
+1088
-0
EEG_Electrode_Board_europanel.pro
EEG_Electrode_Board_europanel.pro
+62
-0
No files found.
EEG_Electrode_Board.kicad_pcb
View file @
5e9949e8
This diff is collapsed.
Click to expand it.
EEG_Electrode_Board.kicad_pcb-bak
View file @
5e9949e8
...
@@ -2,8 +2,8 @@
...
@@ -2,8 +2,8 @@
(general
(general
(links 33)
(links 33)
(no_connects
1
)
(no_connects
0
)
(area 135.
834999 86.014999 160.165001 110.335001
)
(area 135.
643819 86.014999 160.165001 110.5853
)
(thickness 1.6)
(thickness 1.6)
(drawings 18)
(drawings 18)
(tracks 133)
(tracks 133)
...
@@ -15,25 +15,25 @@
...
@@ -15,25 +15,25 @@
(page A4)
(page A4)
(layers
(layers
(0 F.Cu signal)
(0 F.Cu signal)
(31 B.Cu signal
hide
)
(31 B.Cu signal)
(32 B.Adhes user
hide
)
(32 B.Adhes user)
(33 F.Adhes user
hide
)
(33 F.Adhes user)
(34 B.Paste user hide)
(34 B.Paste user hide)
(35 F.Paste user
hide
)
(35 F.Paste user)
(36 B.SilkS user)
(36 B.SilkS user)
(37 F.SilkS user)
(37 F.SilkS user)
(38 B.Mask user
hide
)
(38 B.Mask user)
(39 F.Mask user
hide
)
(39 F.Mask user)
(40 Dwgs.User user
hide
)
(40 Dwgs.User user)
(41 Cmts.User user
hide
)
(41 Cmts.User user)
(42 Eco1.User user
hide
)
(42 Eco1.User user)
(43 Eco2.User user
hide
)
(43 Eco2.User user)
(44 Edge.Cuts user)
(44 Edge.Cuts user)
(45 Margin user
hide
)
(45 Margin user)
(46 B.CrtYd user
hide
)
(46 B.CrtYd user)
(47 F.CrtYd user
hide
)
(47 F.CrtYd user)
(48 B.Fab user)
(48 B.Fab user)
(49 F.Fab user
hide
)
(49 F.Fab user)
)
)
(setup
(setup
...
@@ -291,7 +291,7 @@
...
@@ -291,7 +291,7 @@
(net 4 +5VA))
(net 4 +5VA))
(pad 2 smd rect (at 2 0 90) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
(pad 2 smd rect (at 2 0 90) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
(net 3 GNDREF))
(net 3 GNDREF))
(model
Capacitors_SMD.3dshapes/C_1206
.wrl
(model
${KISYS3DMOD}/Capacitors_Tantalum_SMD.3dshapes/CP_Tantalum_Case-S_EIA-3216-12
.wrl
(at (xyz 0 0 0))
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
(rotate (xyz 0 0 0))
...
...
EEG_Electrode_Board_europanel.kicad_pcb
0 → 100644
View file @
5e9949e8
This diff is collapsed.
Click to expand it.
EEG_Electrode_Board_europanel.kicad_pcb-bak
0 → 100644
View file @
5e9949e8
This diff is collapsed.
Click to expand it.
EEG_Electrode_Board_europanel.pro
0 → 100644
View file @
5e9949e8
update
=
22
/
05
/
2015
07
:
44
:
53
version
=
1
last_client
=
kicad
[
general
]
version
=
1
RootSch
=
BoardNm
=
[
pcbnew
]
version
=
1
LastNetListRead
=
UseCmpFile
=
1
PadDrill
=
0.600000000000
PadDrillOvalY
=
0.600000000000
PadSizeH
=
1.500000000000
PadSizeV
=
1.500000000000
PcbTextSizeV
=
1.500000000000
PcbTextSizeH
=
1.500000000000
PcbTextThickness
=
0.300000000000
ModuleTextSizeV
=
1.000000000000
ModuleTextSizeH
=
1.000000000000
ModuleTextSizeThickness
=
0.150000000000
SolderMaskClearance
=
0.000000000000
SolderMaskMinWidth
=
0.000000000000
DrawSegmentWidth
=
0.200000000000
BoardOutlineThickness
=
0.100000000000
ModuleOutlineThickness
=
0.150000000000
[
cvpcb
]
version
=
1
NetIExt
=
net
[
eeschema
]
version
=
1
LibDir
=
[
eeschema
/
libraries
]
LibName1
=
power
LibName2
=
device
LibName3
=
transistors
LibName4
=
conn
LibName5
=
linear
LibName6
=
regul
LibName7
=
74
xx
LibName8
=
cmos4000
LibName9
=
adc
-
dac
LibName10
=
memory
LibName11
=
xilinx
LibName12
=
microcontrollers
LibName13
=
dsp
LibName14
=
microchip
LibName15
=
analog_switches
LibName16
=
motorola
LibName17
=
texas
LibName18
=
intel
LibName19
=
audio
LibName20
=
interface
LibName21
=
digital
-
audio
LibName22
=
philips
LibName23
=
display
LibName24
=
cypress
LibName25
=
siliconi
LibName26
=
opto
LibName27
=
atmel
LibName28
=
contrib
LibName29
=
valves
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment