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rasky
vSPI
Commits
f819a10f
Commit
f819a10f
authored
Feb 24, 2012
by
Mike Lyons
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Plain Diff
Now support receiving data (Cheetah->vSPI)
parent
3be23a0e
Changes
5
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5 changed files
with
62 additions
and
11 deletions
+62
-11
spiifc.v
src/spi_base/spiifc.v
+47
-7
spiwrap.v
src/spi_base/spiwrap.v
+5
-4
rc-bytes.txt
test/spi_base/rc-bytes.txt
+10
-0
spiifc_tb.v
test/spi_base/spiifc_tb.v
+0
-0
spiifc_tb2.v
test/spi_base/spiifc_tb2.v
+0
-0
No files found.
src/spi_base/spiifc.v
View file @
f819a10f
...
@@ -38,6 +38,14 @@ module spiifc(
...
@@ -38,6 +38,14 @@ module spiifc(
//
//
parameter
AddrBits
=
12
;
parameter
AddrBits
=
12
;
// Defines
`define
CMD_READ_START 8
'
d1
`define
CMD_READ_MORE 8
'
d2
`define
STATE_GET_CMD 8
'
d0
`define
STATE_READING 8
'
d1
//
//
// Input/Output defs
// Input/Output defs
//
//
...
@@ -68,6 +76,9 @@ module spiifc(
...
@@ -68,6 +76,9 @@ module spiifc(
reg
rcStarted
;
reg
rcStarted
;
reg
[
2
:
0
]
rcBitIndexReg
;
reg
[
2
:
0
]
rcBitIndexReg
;
reg
[
11
:
0
]
rcMemAddrReg
;
reg
[
11
:
0
]
rcMemAddrReg
;
reg
[
11
:
0
]
rcMemAddrNext
;
reg
[
7
:
0
]
rcMemDataReg
;
reg
rcMemWEReg
;
reg
ssPrev
;
reg
ssPrev
;
...
@@ -77,6 +88,9 @@ module spiifc(
...
@@ -77,6 +88,9 @@ module spiifc(
reg
ssTurnOnReg
;
reg
ssTurnOnReg
;
reg
ssTurnOnHandled
;
reg
ssTurnOnHandled
;
reg
[
7
:
0
]
cmd
;
reg
[
7
:
0
]
stateReg
;
//
//
// Wires
// Wires
//
//
...
@@ -89,6 +103,8 @@ module spiifc(
...
@@ -89,6 +103,8 @@ module spiifc(
wire
ssFastToggle
;
wire
ssFastToggle
;
wire
[
7
:
0
]
state
;
//
//
// Output assigns
// Output assigns
//
//
...
@@ -98,8 +114,8 @@ module spiifc(
...
@@ -98,8 +114,8 @@ module spiifc(
assign
txMemAddr
=
0
;
assign
txMemAddr
=
0
;
assign
rcMemAddr
=
rcMemAddrReg
;
assign
rcMemAddr
=
rcMemAddrReg
;
assign
rcMemData
=
rc
Byte
;
assign
rcMemData
=
rc
MemDataReg
;
assign
rcMemWE
=
rc
ByteValid
;
assign
rcMemWE
=
rc
MemWEReg
;
assign
ssFastToggle
=
assign
ssFastToggle
=
(
ssPrev
==
1
&&
SPI_SS
==
0
?
~
ssFastToggleReg
:
ssFastToggleReg
)
;
(
ssPrev
==
1
&&
SPI_SS
==
0
?
~
ssFastToggleReg
:
ssFastToggleReg
)
;
...
@@ -112,8 +128,8 @@ module spiifc(
...
@@ -112,8 +128,8 @@ module spiifc(
assign
rcStarting
=
ssTurnOn
;
assign
rcStarting
=
ssTurnOn
;
assign
rcBitIndex
=
(
rcStarting
?
3'd7
:
rcBitIndexReg
)
;
assign
rcBitIndex
=
(
rcStarting
?
3'd7
:
rcBitIndexReg
)
;
//assign ssTurnOn = ~ssTurnOnHandled & (ssTurnOnReg | (ssPrev & (~SPI_SS)));
assign
ssTurnOn
=
ssSlowToggle
^
ssFastToggle
;
assign
ssTurnOn
=
ssSlowToggle
^
ssFastToggle
;
assign
state
=
(
rcStarting
?
`STATE_GET_CMD
:
stateReg
)
;
initial
begin
initial
begin
ssSlowToggle
<=
0
;
ssSlowToggle
<=
0
;
...
@@ -141,6 +157,7 @@ module spiifc(
...
@@ -141,6 +157,7 @@ module spiifc(
always
@
(
posedge
SPI_CLK
)
begin
always
@
(
posedge
SPI_CLK
)
begin
ssSlowToggle
<=
ssFastToggle
;
ssSlowToggle
<=
ssFastToggle
;
if
(
Reset
)
begin
if
(
Reset
)
begin
// Resetting
// Resetting
rcByteReg
<=
8'h00
;
rcByteReg
<=
8'h00
;
...
@@ -152,6 +169,8 @@ module spiifc(
...
@@ -152,6 +169,8 @@ module spiifc(
end
else
begin
end
else
begin
// Not resetting
// Not resetting
ssTurnOnHandled
<=
ssTurnOn
;
ssTurnOnHandled
<=
ssTurnOn
;
stateReg
<=
state
;
rcMemAddrReg
<=
rcMemAddrNext
;
if
(
~
SPI_SS
)
begin
if
(
~
SPI_SS
)
begin
rcByteReg
[
rcBitIndex
]
<=
SPI_MOSI
;
rcByteReg
[
rcBitIndex
]
<=
SPI_MOSI
;
...
@@ -164,8 +183,29 @@ module spiifc(
...
@@ -164,8 +183,29 @@ module spiifc(
if
(
rcByteValid
)
begin
if
(
rcByteValid
)
begin
// For now, just display on LEDs
// For now, just display on LEDs
debug_reg
<=
rcByte
;
debug_reg
<=
rcByte
;
if
(
`STATE_GET_CMD
==
state
)
begin
cmd
<=
rcByte
;
// Will take effect next cycle
if
(
`CMD_READ_START
==
rcByte
)
begin
rcMemAddrNext
<=
0
;
stateReg
<=
`STATE_READING
;
end
else
if
(
`CMD_READ_MORE
==
rcByte
)
begin
stateReg
<=
`STATE_READING
;
end
end
else
if
(
`STATE_READING
==
state
)
begin
rcMemDataReg
<=
rcByte
;
rcMemAddrNext
<=
rcMemAddr
+
1
;
rcMemWEReg
<=
1
;
end
end
end
else
begin
// Not a valid byte
rcMemWEReg
<=
0
;
end
// valid/valid' byte
end
// Reset/Reset'
end
// Reset/Reset'
end
end
...
...
src/spi_base/spiwrap.v
View file @
f819a10f
...
@@ -32,6 +32,7 @@ wire [31:0] douta_dummy;
...
@@ -32,6 +32,7 @@ wire [31:0] douta_dummy;
wire
[
11
:
0
]
spi_addr
;
wire
[
11
:
0
]
spi_addr
;
wire
[
7
:
0
]
spi_data
;
wire
[
7
:
0
]
spi_data
;
wire
[
31
:
0
]
rcMem_douta
;
reg
initMem
;
reg
initMem
;
reg
[
9
:
0
]
initMemAddr
;
reg
[
9
:
0
]
initMemAddr
;
...
@@ -82,8 +83,8 @@ spimem spiMemRc (
...
@@ -82,8 +83,8 @@ spimem spiMemRc (
.
clka
(
SysClk
)
,
.
clka
(
SysClk
)
,
.
ena
(
1'b1
)
,
.
ena
(
1'b1
)
,
.
wea
(
1'b0
)
,
.
wea
(
1'b0
)
,
.
addra
(
10'h00
0
)
,
.
addra
(
10'h00
1
)
,
.
douta
(
debug_out
)
,
.
douta
(
rcMem_douta
)
,
.
clkb
(
spi_clk
)
,
.
clkb
(
spi_clk
)
,
.
enb
(
1'b1
)
,
.
enb
(
1'b1
)
,
.
web
(
spi_rcMem_we
)
,
.
web
(
spi_rcMem_we
)
,
...
@@ -104,11 +105,11 @@ spiifc mySpiIfc (
...
@@ -104,11 +105,11 @@ spiifc mySpiIfc (
.
rcMemAddr
(
spi_rcMem_addr
)
,
.
rcMemAddr
(
spi_rcMem_addr
)
,
.
rcMemData
(
spi_rcMem_data
)
,
.
rcMemData
(
spi_rcMem_data
)
,
.
rcMemWE
(
spi_rcMem_we
)
,
.
rcMemWE
(
spi_rcMem_we
)
,
.
debug_out
(
leds
)
.
debug_out
(
debug_out
)
)
;
)
;
//assign leds = debug_out
;
assign
leds
=
rcMem_douta
[
31
:
24
]
;
endmodule
endmodule
test/spi_base/rc-bytes.txt
0 → 100644
View file @
f819a10f
01
FF
F0
33
55
12
34
56
78
9A
\ No newline at end of file
src
/spi_base/spiifc_tb.v
→
test
/spi_base/spiifc_tb.v
View file @
f819a10f
File moved
src
/spi_base/spiifc_tb2.v
→
test
/spi_base/spiifc_tb2.v
View file @
f819a10f
File moved
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