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rasky
vSPI
Commits
0060d193
Commit
0060d193
authored
Mar 22, 2012
by
Michael J. Lyons
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Making SPI bitrate configurable when initializing spi object
parent
679dcdb6
Changes
2
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2 changed files
with
3 additions
and
4 deletions
+3
-4
spilib.py
scripts/master/spilib.py
+2
-3
spitest.py
scripts/master/spitest.py
+1
-1
No files found.
scripts/master/spilib.py
View file @
0060d193
...
...
@@ -6,7 +6,6 @@ class SpiComm:
_port
=
0
# Change if using multiple Cheetahs
_mode
=
3
# spiifc SPI mode
_bitrate
=
22000
# kbps
handle
=
None
# handle to Cheetah SPI
...
...
@@ -15,14 +14,14 @@ class SpiComm:
def
__init__
(
self
,
msg
):
self
.
msg
=
msg
def
__init__
(
self
):
def
__init__
(
self
,
kbpsBitrate
=
9000
):
self
.
handle
=
ch_open
(
self
.
_port
)
if
(
self
.
handle
<=
0
):
raise
SpiCommError
(
"Unable to open Cheetah device on port
%
d.
\n
Error code =
%
d (
%
s)"
%
(
self
.
_port
,
self
.
handle
,
ch_status_string
(
self
.
handle
)))
ch_host_ifce_speed
(
self
.
handle
)
ch_spi_configure
(
self
.
handle
,
(
self
.
_mode
>>
1
),
self
.
_mode
&
1
,
CH_SPI_BITORDER_MSB
,
0x0
)
ch_spi_bitrate
(
self
.
handle
,
self
.
_b
itrate
)
ch_spi_bitrate
(
self
.
handle
,
kbpsB
itrate
)
def
__del__
(
self
):
ch_close
(
self
.
handle
)
...
...
scripts/master/spitest.py
View file @
0060d193
...
...
@@ -236,7 +236,7 @@ Valid tests (case sensitive):
- MemLoopback
- RegLoopback
- ReadRegs
- WriteRegs
Test
- WriteRegs
- XpsLoopback
"""
...
...
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