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## Filename:          C:\Users\mjlyons\workspace\vSPI\projnav\xps\pcores/spiifc_v1_00_a/data/spiifc_v2_1_0.pao
## Description:       Peripheral Analysis Order
## Date:              Tue Mar 06 14:12:58 2012 (by Create and Import Peripheral Wizard)
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lib proc_common_v3_00_a proc_common_pkg vhdl
lib proc_common_v3_00_a or_muxcy vhdl
lib proc_common_v3_00_a family_support vhdl
lib proc_common_v3_00_a pselect_f vhdl
lib proc_common_v3_00_a or_gate128 vhdl
lib proc_common_v3_00_a ipif_pkg vhdl
lib proc_common_v3_00_a counter_f vhdl
lib plbv46_slave_burst_v1_01_a flex_addr_cntr vhdl
lib plbv46_slave_burst_v1_01_a wr_buffer vhdl
lib plbv46_slave_burst_v1_01_a plb_address_decoder vhdl
lib plbv46_slave_burst_v1_01_a burst_support vhdl
lib plbv46_slave_burst_v1_01_a be_reset_gen vhdl
lib plbv46_slave_burst_v1_01_a addr_reg_cntr_brst_flex vhdl
lib plbv46_slave_burst_v1_01_a plb_slave_attachment vhdl
lib plbv46_slave_burst_v1_01_a data_mirror_128 vhdl
lib spiifc_v1_00_a spiifc verilog
lib spiifc_v1_00_a buffermem verilog
lib plbv46_slave_burst_v1_01_a plbv46_slave_burst vhdl
lib interrupt_control_v2_01_a interrupt_control vhdl
lib spiifc_v1_00_a user_logic verilog
lib spiifc_v1_00_a spiifc vhdl
