spiwrap Project Status
Project File: | spiifc.xise | Parser Errors: | No Errors
Module Name: | spiloop | Implementation State: | New

Target Device:

xc6slx45-2csg324

- Errors:

Product Version:

ISE 13.2

- Warnings:

Design Goal:</dif>

Balanced

- Routing Results:

Design Strategy:</dif>

Xilinx Default (unlocked)

- Timing Constraints:

Environment:</dif>

System Settings

- Final Timing Score:

Detailed Reports | [-]
Report Name | Status | Generated | Errors | Warnings | Infos
Synthesis Report |  |  |  |  |
Translation Report |  |  |  |  |
Map Report |  |  |  |  |
Place and Route Report |  |  |  |  |
Power Report |  |  |  |  |
Post-PAR Static Timing Report |  |  |  |  |
Bitgen Report |  |  |  |  |

Secondary Reports | [-]
Report Name | Status | Generated
WebTalk Report | Out of Date | Wed Mar 7 17:56:17 2012
WebTalk Log File | Out of Date | Wed Mar 7 17:56:22 2012

Date Generated: 03/07/2012 - 18:05:09