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Commit fd763846 authored by Deomid Ryabkov's avatar Deomid Ryabkov Committed by Cesanta Bot
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TI Tiva TM4C129 support and example project 

PUBLISHED_FROM=c3d59657adff247f565bf0be59192e32d5d0bbf6
parent f4f310cf
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examples/Makefile
View file @ fd763846
......@@ -3,7 +3,7 @@
# `wildcard ./*/` works in both linux and linux/wine, while `wildcard */` enumerates nothing under wine
SUBDIRS = $(sort $(dir $(wildcard ./*/)))
SUBDIRS:=$(filter-out ./ ./CC3200/ ./ESP8266_RTOS/ ./MSP432/ ./NXP_LPC4088/ ./NXP_K64/ ./PIC32/ ./STM32F4_CC3100/ ./mbed/ ./nRF51/ ./nRF52/ ./WinCE/, $(SUBDIRS))
SUBDIRS:=$(filter-out ./ ./CC3200/ ./ESP8266_RTOS/ ./mbed/ ./MSP432/ ./nRF51/ ./nRF52/ ./NXP_K64/ ./NXP_LPC4088/ ./PIC32/ ./STM32F4_CC3100/ ./TM4C129/ ./WinCE/, $(SUBDIRS))
ifeq ($(OS), Windows_NT)
SUBDIRS:=$(filter-out ./netcat/ ./raspberry_pi_mjpeg_led/ ./captive_dns_server/, $(SUBDIRS))
......
examples/TM4C129/ccs/Makefile 0 → 100644
View file @ fd763846
clean:
rm -rf */Debug */Release */.launches */.settings */.xdchelp */drivers */utils
examples/TM4C129/ccs/Mongoose_TM4C129_BM/.ccsproject 0 → 100644
View file @ fd763846
<?xml version="1.0" encoding="UTF-8" ?>
<?ccsproject version="1.0"?>
<projectOptions>
<deviceVariant value="Cortex M.TM4C129ENCPDT"/>
<deviceFamily value="TMS470"/>
<deviceEndianness value="little"/>
<codegenToolVersion value="5.2.8"/>
<isElfFormat value="true"/>
<rts value="libc.a"/>
<createSlaveProjects value=""/>
<isTargetManual value="true"/>
</projectOptions>
examples/TM4C129/ccs/Mongoose_TM4C129_BM/.cproject 0 → 100644
View file @ fd763846
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</folderInfo>
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
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examples/TM4C129/ccs/Mongoose_TM4C129_BM/.project 0 → 100644
View file @ fd763846
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>Mongoose_TM4C129_BM</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>com.ti.ccstudio.core.ccsNature</nature>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.core.ccnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<linkedResources>
<link>
<name>drivers/pinout.c</name>
<type>1</type>
<locationURI>SDK_ROOT/examples/boards/ek-tm4c129exl/drivers/pinout.c</locationURI>
</link>
<link>
<name>utils/lwiplib.c</name>
<type>1</type>
<locationURI>SDK_ROOT/utils/lwiplib.c</locationURI>
</link>
<link>
<name>utils/uartstdio.c</name>
<type>1</type>
<locationURI>SDK_ROOT/utils/uartstdio.c</locationURI>
</link>
<link>
<name>utils/ustdlib.c</name>
<type>1</type>
<locationURI>SDK_ROOT/utils/ustdlib.c</locationURI>
</link>
<link>
<name>mongoose.c</name>
<type>1</type>
<locationURI>MG_ROOT/mongoose.c</locationURI>
</link>
<link>
<name>mongoose.h</name>
<type>1</type>
<locationURI>MG_ROOT/mongoose.h</locationURI>
</link>
</linkedResources>
<variableList>
<variable>
<name>SDK_ROOT</name>
<value>$%7BTI_PRODUCTS_DIR%7D/TivaWare_C_Series-2.1.3.156</value>
</variable>
<variable>
<name>MG_ROOT</name>
<value>$%7BPARENT-4-PROJECT_LOC%7D</value>
</variable>
</variableList>
</projectDescription>
examples/TM4C129/ccs/Mongoose_TM4C129_BM/Mongoose_TM4C129_BM.cmd 0 → 100644
View file @ fd763846
/******************************************************************************
*
* Mongoose_TM4C129_BM.cmd - CCS linker configuration file for Mongoose_TM4C129_BM.
*
* Copyright (c) 2013-2016 Texas Instruments Incorporated. All rights reserved.
* Software License Agreement
*
* Texas Instruments (TI) is supplying this software for use solely and
* exclusively on TI's microcontroller products. The software is owned by
* TI and/or its suppliers, and is protected under applicable copyright
* laws. You may not combine this software with "viral" open-source
* software in order to form a larger program.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
* NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
* CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
* DAMAGES, FOR ANY REASON WHATSOEVER.
*
* This is part of revision 2.1.3.156 of the EK-TM4C129EXL Firmware Package.
*
*****************************************************************************/
--retain=g_pfnVectors
/* The following command line options are set as part of the CCS project. */
/* If you are building using the command line, or for some reason want to */
/* define them here, you can uncomment and modify these lines as needed. */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone. */
/* */
/* --heap_size=0 */
/* --stack_size=256 */
/* --library=rtsv7M3_T_le_eabi.lib */
/* The starting address of the application. Normally the interrupt vectors */
/* must be located at the beginning of the application. */
#define APP_BASE 0x00000000
#define RAM_BASE 0x20000000
/* System memory map */
MEMORY
{
/* Application stored in and executes from internal flash */
FLASH (RX) : origin = APP_BASE, length = 0x00100000
/* Application uses internal RAM for data */
SRAM (RWX) : origin = 0x20000000, length = 0x00040000
}
/* Section allocation in memory */
SECTIONS
{
.intvecs: > APP_BASE
.text : > FLASH
.const : > FLASH
.cinit : > FLASH
.pinit : > FLASH
.init_array : > FLASH
.vtable : > RAM_BASE
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM
}
__STACK_TOP = __stack + 2048;
examples/TM4C129/ccs/Mongoose_TM4C129_BM/lwipopts.h 0 → 100644
View file @ fd763846
/* clang-format off */
//*****************************************************************************
//
// lwipopts.h - Configuration file for lwIP
//
// Copyright (c) 2013-2016 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 2.1.3.156 of the EK-TM4C129EXL Firmware Package.
//
//*****************************************************************************
//
// NOTE: This file has been derived from the lwIP/src/include/lwip/opt.h
// header file.
//
// For additional details, refer to the original "opt.h" file, and lwIP
// documentation.
//
//*****************************************************************************
#ifndef __LWIPOPTS_H__
#define __LWIPOPTS_H__
//*****************************************************************************
//
// ---------- Stellaris / lwIP Port Options ----------
//
//*****************************************************************************
#define HOST_TMR_INTERVAL 100 // default is 0
//#define DHCP_EXPIRE_TIMER_MSECS (60 * 1000)
//#define LWIP_HTTPD_SSI 1
//#define LWIP_HTTPD_CGI 1
#define LWIP_HTTPD_DYNAMIC_HEADERS 1
//#define HTTPD_DEBUG LWIP_DBG_ON
#define EMAC_PHY_CONFIG (EMAC_PHY_TYPE_INTERNAL | EMAC_PHY_INT_MDIX_EN | \
EMAC_PHY_AN_100B_T_FULL_DUPLEX)
#define PHY_PHYS_ADDR 0
#define NUM_TX_DESCRIPTORS 24
#define NUM_RX_DESCRIPTORS 8
//*****************************************************************************
//
// ---------- Platform specific locking ----------
//
//*****************************************************************************
#define SYS_LIGHTWEIGHT_PROT 1 // default is 0
#define NO_SYS 1 // default is 0
//#define MEMCPY(dst,src,len) memcpy(dst,src,len)
//#define SMEMCPY(dst,src,len) memcpy(dst,src,len)
//*****************************************************************************
//
// ---------- Memory options ----------
//
//*****************************************************************************
//#define MEM_LIBC_MALLOC 0
#define MEM_ALIGNMENT 4
#define MEM_SIZE (64 * 1024)
//#define MEMP_OVERFLOW_CHECK 0
//#define MEMP_SANITY_CHECK 0
//#define MEM_USE_POOLS 0
//#define MEMP_USE_CUSTOM_POOLS 0
//*****************************************************************************
//
// ---------- Internal Memory Pool Sizes ----------
//
//*****************************************************************************
#define MEMP_NUM_PBUF 48 // Default 16
//#define MEMP_NUM_RAW_PCB 4
//#define MEMP_NUM_UDP_PCB 4
#define MEMP_NUM_TCP_PCB 16 // Default 5
//#define MEMP_NUM_TCP_PCB_LISTEN 8
//#define MEMP_NUM_TCP_SEG 16
//#define MEMP_NUM_REASSDATA 5
//#define MEMP_NUM_ARP_QUEUE 30
//#define MEMP_NUM_IGMP_GROUP 8
#define MEMP_NUM_SYS_TIMEOUT 8
//#define MEMP_NUM_NETBUF 2
//#define MEMP_NUM_NETCONN 4
//#define MEMP_NUM_TCPIP_MSG_API 8
//#define MEMP_NUM_TCPIP_MSG_INPKT 8
#define PBUF_POOL_SIZE 48 // Default 16
//*****************************************************************************
//
// ---------- ARP options ----------
//
//*****************************************************************************
//#define LWIP_ARP 1
//#define ARP_TABLE_SIZE 10
//#define ARP_QUEUEING 1
//#define ETHARP_TRUST_IP_MAC 1
//*****************************************************************************
//
// ---------- IP options ----------
//
//*****************************************************************************
//#define IP_FORWARD 0
//#define IP_OPTIONS_ALLOWED 1
#define IP_REASSEMBLY 0 // default is 1
#define IP_FRAG 0 // default is 1
//#define IP_REASS_MAXAGE 3
//#define IP_REASS_MAX_PBUFS 10
//#define IP_FRAG_USES_STATIC_BUF 1
//#define IP_FRAG_MAX_MTU 1500
//#define IP_DEFAULT_TTL 255
//*****************************************************************************
//
// ---------- ICMP options ----------
//
//*****************************************************************************
//#define LWIP_ICMP 1
//#define ICMP_TTL (IP_DEFAULT_TTL)
//*****************************************************************************
//
// ---------- RAW options ----------
//
//*****************************************************************************
//#define LWIP_RAW 1
//#define RAW_TTL (IP_DEFAULT_TTL)
//*****************************************************************************
//
// ---------- DHCP options ----------
//
//*****************************************************************************
#define LWIP_DHCP 1 // default is 0
//#define DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP))
//*****************************************************************************
//
// ---------- UPNP options ----------
//
//*****************************************************************************
//#define LWIP_UPNP 0
//*****************************************************************************
//
// ---------- PTPD options ----------
//
//*****************************************************************************
//#define LWIP_PTPD 0
//*****************************************************************************
//
// ---------- AUTOIP options ----------
//
//*****************************************************************************
#define LWIP_AUTOIP 1 // default is 0
#define LWIP_DHCP_AUTOIP_COOP ((LWIP_DHCP) && (LWIP_AUTOIP))
// default is 0
#define LWIP_DHCP_AUTOIP_COOP_TRIES 5 // default is 9
//*****************************************************************************
//
// ---------- SNMP options ----------
//
//*****************************************************************************
//#define LWIP_SNMP 0
//#define SNMP_CONCURRENT_REQUESTS 1
//#define SNMP_TRAP_DESTINATIONS 1
//#define SNMP_PRIVATE_MIB 0
//#define SNMP_SAFE_REQUESTS 1
//*****************************************************************************
//
// ---------- IGMP options ----------
//
//*****************************************************************************
//#define LWIP_IGMP 0
//*****************************************************************************
//
// ---------- DNS options -----------
//
//*****************************************************************************
//#define LWIP_DNS 0
//#define DNS_TABLE_SIZE 4
//#define DNS_MAX_NAME_LENGTH 256
//#define DNS_MAX_SERVERS 2
//#define DNS_DOES_NAME_CHECK 1
//#define DNS_USES_STATIC_BUF 1
//#define DNS_MSG_SIZE 512
//*****************************************************************************
//
// ---------- UDP options ----------
//
//*****************************************************************************
//#define LWIP_UDP 1
//#define LWIP_UDPLITE 0
//#define UDP_TTL (IP_DEFAULT_TTL)
//*****************************************************************************
//
// ---------- TCP options ----------
//
//*****************************************************************************
#define LWIP_TCP 1
//#define TCP_TTL (IP_DEFAULT_TTL)
#define TCP_WND 4096 // default is 2048
//#define TCP_MAXRTX 12
//#define TCP_SYNMAXRTX 6
//#define TCP_QUEUE_OOSEQ 1
#define TCP_MSS 1500 // default is 128
//#define TCP_CALCULATE_EFF_SEND_MSS 1
#define TCP_SND_BUF (4 * TCP_MSS)
// default is 256, was 6 *
//#define TCP_SND_QUEUELEN (4 * (TCP_SND_BUF/TCP_MSS))
//#define TCP_SNDLOWAT (TCP_SND_BUF/2)
//#define TCP_LISTEN_BACKLOG 0
//#define TCP_DEFAULT_LISTEN_BACKLOG 0xff
//*****************************************************************************
//
// ---------- API options ----------
//
//*****************************************************************************
//#define LWIP_EVENT_API 0
//#define LWIP_CALLBACK_API 1
//*****************************************************************************
//
// ---------- Pbuf options ----------
//
//*****************************************************************************
#define PBUF_LINK_HLEN 16 // default is 14
#define PBUF_POOL_BUFSIZE 512
// PBUF_POOL_BUFSIZE default is
// LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN)
#define ETH_PAD_SIZE 0 // default is 0
//*****************************************************************************
//
// ---------- Network Interfaces options ----------
//
//*****************************************************************************
//#define LWIP_NETIF_HOSTNAME 0
//#define LWIP_NETIF_API 0
//#define LWIP_NETIF_STATUS_CALLBACK 0
//#define LWIP_NETIF_LINK_CALLBACK 0
//#define LWIP_NETIF_HWADDRHINT 0
//*****************************************************************************
//
// ---------- LOOPIF options ----------
//
//*****************************************************************************
//#define LWIP_HAVE_LOOPIF 0
//#define LWIP_LOOPIF_MULTITHREADING 1
//*****************************************************************************
//
// ---------- Thread options ----------
//
//*****************************************************************************
//#define TCPIP_THREAD_NAME "tcpip_thread"
//#define TCPIP_THREAD_STACKSIZE 0
//#define TCPIP_THREAD_PRIO 1
//#define TCPIP_MBOX_SIZE 0
//#define SLIPIF_THREAD_NAME "slipif_loop"
//#define SLIPIF_THREAD_STACKSIZE 0
//#define SLIPIF_THREAD_PRIO 1
//#define PPP_THREAD_NAME "pppMain"
//#define PPP_THREAD_STACKSIZE 0
//#define PPP_THREAD_PRIO 1
//#define DEFAULT_THREAD_NAME "lwIP"
//#define DEFAULT_THREAD_STACKSIZE 0
//#define DEFAULT_THREAD_PRIO 1
//#define DEFAULT_RAW_RECVMBOX_SIZE 0
//#define DEFAULT_UDP_RECVMBOX_SIZE 0
//#define DEFAULT_TCP_RECVMBOX_SIZE 0
//#define DEFAULT_ACCEPTMBOX_SIZE 0
//*****************************************************************************
//
// ---------- Sequential layer options ----------
//
//*****************************************************************************
//#define LWIP_TCPIP_CORE_LOCKING 0
#define LWIP_NETCONN 0 // default is 1
//*****************************************************************************
//
// ---------- Socket Options ----------
//
//*****************************************************************************
#define LWIP_SOCKET 0 // default is 1
//#define LWIP_COMPAT_SOCKETS 1
//#define LWIP_POSIX_SOCKETS_IO_NAMES 1
#define LWIP_TCP_KEEPALIVE 1
//#define LWIP_SO_RCVTIMEO 0
//#define LWIP_SO_RCVBUF 0
//#define SO_REUSE 0
//*****************************************************************************
//
// ---------- Statistics options ----------
//
//*****************************************************************************
//#define LWIP_STATS 1
//#define LWIP_STATS_DISPLAY 0
//#define LINK_STATS 1
//#define ETHARP_STATS (LWIP_ARP)
//#define IP_STATS 1
//#define IPFRAG_STATS (IP_REASSEMBLY || IP_FRAG)
//#define ICMP_STATS 1
//#define IGMP_STATS (LWIP_IGMP)
//#define UDP_STATS (LWIP_UDP)
//#define TCP_STATS (LWIP_TCP)
//#define MEM_STATS 1
//#define MEMP_STATS 1
//#define SYS_STATS 1
//*****************************************************************************
//
// ---------- PPP options ----------
//
//*****************************************************************************
//#define PPP_SUPPORT 0
//#define PPPOE_SUPPORT 0
//#define PPPOS_SUPPORT PPP_SUPPORT
#if PPP_SUPPORT
//#define NUM_PPP 1
//#define PAP_SUPPORT 0
//#define CHAP_SUPPORT 0
//#define MSCHAP_SUPPORT 0
//#define CBCP_SUPPORT 0
//#define CCP_SUPPORT 0
//#define VJ_SUPPORT 0
//#define MD5_SUPPORT 0
//#define FSM_DEFTIMEOUT 6
//#define FSM_DEFMAXTERMREQS 2
//#define FSM_DEFMAXCONFREQS 10
//#define FSM_DEFMAXNAKLOOPS 5
//#define UPAP_DEFTIMEOUT 6
//#define UPAP_DEFREQTIME 30
//#define CHAP_DEFTIMEOUT 6
//#define CHAP_DEFTRANSMITS 10
//#define LCP_ECHOINTERVAL 0
//#define LCP_MAXECHOFAILS 3
//#define PPP_MAXIDLEFLAG 100
//#define PPP_MAXMTU 1500
//#define PPP_DEFMRU 296
#endif
//*****************************************************************************
//
// ---------- checksum options ----------
//
//*****************************************************************************
#define CHECKSUM_GEN_IP 0
#define CHECKSUM_GEN_ICMP 0
#define CHECKSUM_GEN_UDP 0
#define CHECKSUM_GEN_TCP 0
#define CHECKSUM_CHECK_IP 0
#define CHECKSUM_CHECK_UDP 0
#define CHECKSUM_CHECK_TCP 0
//*****************************************************************************
//
// ---------- Debugging options ----------
//
//*****************************************************************************
#if 0
#define U8_F "c"
#define S8_F "c"
#define X8_F "x"
#define U16_F "u"
#define S16_F "d"
#define X16_F "x"
#define U32_F "u"
#define S32_F "d"
#define X32_F "x"
extern void UARTprintf(const char *pcString, ...);
#define LWIP_DEBUG
#endif
//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_OFF
#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_OFF
//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_WARNING
//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_SERIOUS
//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_SEVERE
//#define LWIP_DBG_TYPES_ON LWIP_DBG_ON
#define LWIP_DBG_TYPES_ON (LWIP_DBG_ON|LWIP_DBG_TRACE| \
LWIP_DBG_STATE|LWIP_DBG_FRESH)
//#define ETHARP_DEBUG LWIP_DBG_ON // default is OFF
//#define NETIF_DEBUG LWIP_DBG_ON // default is OFF
//#define PBUF_DEBUG LWIP_DBG_OFF
//#define API_LIB_DEBUG LWIP_DBG_OFF
//#define API_MSG_DEBUG LWIP_DBG_OFF
//#define SOCKETS_DEBUG LWIP_DBG_OFF
//#define ICMP_DEBUG LWIP_DBG_OFF
//#define IGMP_DEBUG LWIP_DBG_OFF
//#define INET_DEBUG LWIP_DBG_OFF
//#define IP_DEBUG LWIP_DBG_ON // default is OFF
//#define IP_REASS_DEBUG LWIP_DBG_OFF
//#define RAW_DEBUG LWIP_DBG_OFF
//#define MEM_DEBUG LWIP_DBG_OFF
//#define MEMP_DEBUG LWIP_DBG_OFF
//#define SYS_DEBUG LWIP_DBG_OFF
//#define TCP_DEBUG LWIP_DBG_OFF
//#define TCP_INPUT_DEBUG LWIP_DBG_OFF
//#define TCP_FR_DEBUG LWIP_DBG_OFF
//#define TCP_RTO_DEBUG LWIP_DBG_OFF
//#define TCP_CWND_DEBUG LWIP_DBG_OFF
//#define TCP_WND_DEBUG LWIP_DBG_OFF
//#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF
//#define TCP_RST_DEBUG LWIP_DBG_OFF
//#define TCP_QLEN_DEBUG LWIP_DBG_OFF
//#define UDP_DEBUG LWIP_DBG_ON // default is OFF
//#define TCPIP_DEBUG LWIP_DBG_OFF
//#define PPP_DEBUG LWIP_DBG_OFF
//#define SLIP_DEBUG LWIP_DBG_OFF
//#define DHCP_DEBUG LWIP_DBG_ON // default is OFF
//#define AUTOIP_DEBUG LWIP_DBG_OFF
//#define SNMP_MSG_DEBUG LWIP_DBG_OFF
//#define SNMP_MIB_DEBUG LWIP_DBG_OFF
//#define DNS_DEBUG LWIP_DBG_OFF
#endif /* __LWIPOPTS_H__ */
examples/TM4C129/ccs/Mongoose_TM4C129_BM/main.c 0 → 100644
View file @ fd763846
/*
* Copyright (c) 2014-2016 Cesanta Software Limited
* All rights reserved
*
*
* This example sets up a simple HTTP server using the Mongoose multi-protocol
* networking library.
*
* It assumes TivaWare is installed under
* ${TI_PRODUCTS_DIR}/TivaWare_C_Series-2.1.3.156. ${TI_PRODUCTS_DIR} is usually
* C:\ti on Windows, ~/ti on Linux.
*
* If you have a different version installed, please edit the SDK_ROOT path
* variable under Project -> Properties -> Resource -> Linked Resources.
*/
#include <stdbool.h>
#include <stdint.h>
#include "mongoose.h"
#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "driverlib/flash.h"
#include "driverlib/interrupt.h"
#include "driverlib/gpio.h"
#include "driverlib/rom_map.h"
#include "driverlib/sysctl.h"
#include "driverlib/systick.h"
#include "utils/lwiplib.h"
#include "utils/ustdlib.h"
#include "utils/uartstdio.h"
#include "drivers/pinout.h"
#define SYSTICKHZ 100
#define SYSTICKMS (1000 / SYSTICKHZ)
struct mg_mgr g_mgr;
// The main Mongoose event handler.
void ev_handler(struct mg_connection *nc, int ev, void *ev_data) {
static int led_value = 0;
if (ev == MG_EV_POLL) return;
// UARTprintf("%p: ev %d\r\n", nc, ev);
switch (ev) {
case MG_EV_ACCEPT: {
char addr[32];
mg_sock_addr_to_str(&nc->sa, addr, sizeof(addr),
MG_SOCK_STRINGIFY_IP | MG_SOCK_STRINGIFY_PORT);
UARTprintf("%p: Connection from %s\r\n", nc, addr);
break;
}
case MG_EV_HTTP_REQUEST: {
struct http_message *hm = (struct http_message *) ev_data;
char addr[32];
mg_sock_addr_to_str(&nc->sa, addr, sizeof(addr),
MG_SOCK_STRINGIFY_IP | MG_SOCK_STRINGIFY_PORT);
UARTprintf("%p: HTTP request\r\n", nc);
mg_send_response_line(nc, 200,
"Content-Type: text/html\r\n"
"Connection: close");
mg_printf(nc,
"\r\n<h1>Hello, %s!</h1>\r\n"
"You asked for %.*s\r\n",
addr, (int) hm->uri.len, hm->uri.p);
nc->flags |= MG_F_SEND_AND_CLOSE;
led_value ^= CLP_D1;
LEDWrite(CLP_D1, led_value);
break;
}
case MG_EV_CLOSE: {
UARTprintf("%p: Connection closed\r\n", nc);
break;
}
}
}
int gettimeofday(struct timeval *tv, void *tzvp) {
tv->tv_sec = time(NULL);
tv->tv_usec = 0;
return 0;
}
void mg_lwip_mgr_schedule_poll(struct mg_mgr *mgr) {
}
// Special IP address values that lwiplib uses.
#define IP_LINK_DOWN (0xffffffffU)
#define IP_LINK_UP (0)
// Invoked by lwiplib every HOST_TMR_INTERVAL ms (defined in lwipopts.h).
void lwIPHostTimerHandler(void) {
static uint32_t old_ip = IP_LINK_DOWN;
uint32_t ip = lwIPLocalIPAddrGet();
if (ip != old_ip) {
switch (ip) {
case IP_LINK_DOWN: {
UARTprintf("Link down.\r\n");
LEDWrite(CLP_D2, 0);
break;
}
case IP_LINK_UP: {
UARTprintf("Link up.\r\n");
LEDWrite(CLP_D2, 0);
break;
}
default: {
UARTprintf("IP: http://%s/\r\n", ipaddr_ntoa((const ip_addr_t *) &ip));
LEDWrite(CLP_D2, CLP_D2);
break;
}
}
old_ip = ip;
}
mg_mgr_poll(&g_mgr, 0);
}
void SysTickIntHandler(void) {
// Call the lwIP timer handler.
lwIPTimer(SYSTICKMS);
}
int main(void) {
//
// Make sure the main oscillator is enabled because this is required by
// the PHY. The system must have a 25MHz crystal attached to the OSC
// pins. The SYSCTL_MOSC_HIGHFREQ parameter is used when the crystal
// frequency is 10MHz or higher.
//
SysCtlMOSCConfigSet(SYSCTL_MOSC_HIGHFREQ);
// Run from the PLL at 120 MHz.
uint32_t sys_clk =
MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN |
SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480),
120000000);
// Configure the device pins.
PinoutSet(true, false);
// Configure UART.
UARTStdioConfig(0, 115200, sys_clk);
UARTprintf("Mongoose example\n\n");
// Configure board's LEDs: D2 is on when IP has been acquired,
// D1 is toggled on every HTTP request.
MAP_GPIOPinTypeGPIOOutput(CLP_D1_PORT, CLP_D1_PIN);
MAP_GPIOPinTypeGPIOOutput(CLP_D2_PORT, CLP_D2_PIN);
LEDWrite(CLP_D1, 0);
LEDWrite(CLP_D2, 0);
//
// Configure the hardware MAC address for Ethernet Controller filtering of
// incoming packets. The MAC address will be stored in the non-volatile
// USER0 and USER1 registers.
//
uint32_t u0, u1;
MAP_FlashUserGet(&u0, &u1);
uint8_t mac[6];
mac[0] = ((u0 >> 0) & 0xff);
mac[1] = ((u0 >> 8) & 0xff);
mac[2] = ((u0 >> 16) & 0xff);
mac[3] = ((u1 >> 0) & 0xff);
mac[4] = ((u1 >> 8) & 0xff);
mac[5] = ((u1 >> 16) & 0xff);
// Initialize the lwIP library, using DHCP.
lwIPInit(sys_clk, mac, 0, 0, 0, IPADDR_USE_DHCP);
// Configure Mongoose, create an HTTP listener.
mg_mgr_init(&g_mgr, NULL);
const char *err;
struct mg_bind_opts opts = {};
opts.error_string = &err;
struct mg_connection *nc = mg_bind_opt(&g_mgr, "80", ev_handler, opts);
if (nc == NULL) {
UARTprintf("Failed to create listener: %s\r\n", err);
return 1;
}
mg_set_protocol_http_websocket(nc);
// Configure SysTick for a periodic interrupt.
MAP_SysTickPeriodSet(sys_clk / SYSTICKHZ);
MAP_SysTickEnable();
MAP_SysTickIntEnable();
// Loop forever. All the work is done in interrupt handlers.
while (true) {
}
}
examples/TM4C129/ccs/Mongoose_TM4C129_BM/startup_ccs.c 0 → 100644
View file @ fd763846
/* clang-format off */
//*****************************************************************************
//
// startup_ccs.c - Startup code for use with TI's Code Composer Studio.
//
// Copyright (c) 2013-2016 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 2.1.3.156 of the EK-TM4C129EXL Firmware Package.
//
//*****************************************************************************
#include <stdint.h>
#include "inc/hw_nvic.h"
#include "inc/hw_types.h"
//*****************************************************************************
//
// Forward declaration of the default fault handlers.
//
//*****************************************************************************
void ResetISR(void);
static void NmiSR(void);
static void FaultISR(void);
static void IntDefaultHandler(void);
//*****************************************************************************
//
// External declaration for the reset handler that is to be called when the
// processor is started
//
//*****************************************************************************
extern void _c_int00(void);
//*****************************************************************************
//
// Linker variable that marks the top of the stack.
//
//*****************************************************************************
extern uint32_t __STACK_TOP;
//*****************************************************************************
//
// External declarations for the interrupt handlers used by the application.
//
//*****************************************************************************
extern void lwIPEthernetIntHandler(void);
extern void SysTickIntHandler(void);
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000 or at the start of
// the program if located at a start address other than 0.
//
//*****************************************************************************
#pragma DATA_SECTION(g_pfnVectors, ".intvecs")
void (* const g_pfnVectors[])(void) =
{
(void (*)(void))((uint32_t)&__STACK_TOP),
// The initial stack pointer
ResetISR, // The reset handler
NmiSR, // The NMI handler
FaultISR, // The hard fault handler
IntDefaultHandler, // The MPU fault handler
IntDefaultHandler, // The bus fault handler
IntDefaultHandler, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
IntDefaultHandler, // SVCall handler
IntDefaultHandler, // Debug monitor handler
0, // Reserved
IntDefaultHandler, // The PendSV handler
SysTickIntHandler, // The SysTick handler
IntDefaultHandler, // GPIO Port A
IntDefaultHandler, // GPIO Port B
IntDefaultHandler, // GPIO Port C
IntDefaultHandler, // GPIO Port D
IntDefaultHandler, // GPIO Port E
IntDefaultHandler, // UART0 Rx and Tx
IntDefaultHandler, // UART1 Rx and Tx
IntDefaultHandler, // SSI0 Rx and Tx
IntDefaultHandler, // I2C0 Master and Slave
IntDefaultHandler, // PWM Fault
IntDefaultHandler, // PWM Generator 0
IntDefaultHandler, // PWM Generator 1
IntDefaultHandler, // PWM Generator 2
IntDefaultHandler, // Quadrature Encoder 0
IntDefaultHandler, // ADC Sequence 0
IntDefaultHandler, // ADC Sequence 1
IntDefaultHandler, // ADC Sequence 2
IntDefaultHandler, // ADC Sequence 3
IntDefaultHandler, // Watchdog timer
IntDefaultHandler, // Timer 0 subtimer A
IntDefaultHandler, // Timer 0 subtimer B
IntDefaultHandler, // Timer 1 subtimer A
IntDefaultHandler, // Timer 1 subtimer B
IntDefaultHandler, // Timer 2 subtimer A
IntDefaultHandler, // Timer 2 subtimer B
IntDefaultHandler, // Analog Comparator 0
IntDefaultHandler, // Analog Comparator 1
IntDefaultHandler, // Analog Comparator 2
IntDefaultHandler, // System Control (PLL, OSC, BO)
IntDefaultHandler, // FLASH Control
IntDefaultHandler, // GPIO Port F
IntDefaultHandler, // GPIO Port G
IntDefaultHandler, // GPIO Port H
IntDefaultHandler, // UART2 Rx and Tx
IntDefaultHandler, // SSI1 Rx and Tx
IntDefaultHandler, // Timer 3 subtimer A
IntDefaultHandler, // Timer 3 subtimer B
IntDefaultHandler, // I2C1 Master and Slave
IntDefaultHandler, // CAN0
IntDefaultHandler, // CAN1
lwIPEthernetIntHandler, // Ethernet
IntDefaultHandler, // Hibernate
IntDefaultHandler, // USB0
IntDefaultHandler, // PWM Generator 3
IntDefaultHandler, // uDMA Software Transfer
IntDefaultHandler, // uDMA Error
IntDefaultHandler, // ADC1 Sequence 0
IntDefaultHandler, // ADC1 Sequence 1
IntDefaultHandler, // ADC1 Sequence 2
IntDefaultHandler, // ADC1 Sequence 3
IntDefaultHandler, // External Bus Interface 0
IntDefaultHandler, // GPIO Port J
IntDefaultHandler, // GPIO Port K
IntDefaultHandler, // GPIO Port L
IntDefaultHandler, // SSI2 Rx and Tx
IntDefaultHandler, // SSI3 Rx and Tx
IntDefaultHandler, // UART3 Rx and Tx
IntDefaultHandler, // UART4 Rx and Tx
IntDefaultHandler, // UART5 Rx and Tx
IntDefaultHandler, // UART6 Rx and Tx
IntDefaultHandler, // UART7 Rx and Tx
IntDefaultHandler, // I2C2 Master and Slave
IntDefaultHandler, // I2C3 Master and Slave
IntDefaultHandler, // Timer 4 subtimer A
IntDefaultHandler, // Timer 4 subtimer B
IntDefaultHandler, // Timer 5 subtimer A
IntDefaultHandler, // Timer 5 subtimer B
IntDefaultHandler, // FPU
0, // Reserved
0, // Reserved
IntDefaultHandler, // I2C4 Master and Slave
IntDefaultHandler, // I2C5 Master and Slave
IntDefaultHandler, // GPIO Port M
IntDefaultHandler, // GPIO Port N
0, // Reserved
IntDefaultHandler, // Tamper
IntDefaultHandler, // GPIO Port P (Summary or P0)
IntDefaultHandler, // GPIO Port P1
IntDefaultHandler, // GPIO Port P2
IntDefaultHandler, // GPIO Port P3
IntDefaultHandler, // GPIO Port P4
IntDefaultHandler, // GPIO Port P5
IntDefaultHandler, // GPIO Port P6
IntDefaultHandler, // GPIO Port P7
IntDefaultHandler, // GPIO Port Q (Summary or Q0)
IntDefaultHandler, // GPIO Port Q1
IntDefaultHandler, // GPIO Port Q2
IntDefaultHandler, // GPIO Port Q3
IntDefaultHandler, // GPIO Port Q4
IntDefaultHandler, // GPIO Port Q5
IntDefaultHandler, // GPIO Port Q6
IntDefaultHandler, // GPIO Port Q7
IntDefaultHandler, // GPIO Port R
IntDefaultHandler, // GPIO Port S
IntDefaultHandler, // SHA/MD5 0
IntDefaultHandler, // AES 0
IntDefaultHandler, // DES3DES 0
IntDefaultHandler, // LCD Controller 0
IntDefaultHandler, // Timer 6 subtimer A
IntDefaultHandler, // Timer 6 subtimer B
IntDefaultHandler, // Timer 7 subtimer A
IntDefaultHandler, // Timer 7 subtimer B
IntDefaultHandler, // I2C6 Master and Slave
IntDefaultHandler, // I2C7 Master and Slave
IntDefaultHandler, // HIM Scan Matrix Keyboard 0
IntDefaultHandler, // One Wire 0
IntDefaultHandler, // HIM PS/2 0
IntDefaultHandler, // HIM LED Sequencer 0
IntDefaultHandler, // HIM Consumer IR 0
IntDefaultHandler, // I2C8 Master and Slave
IntDefaultHandler, // I2C9 Master and Slave
IntDefaultHandler // GPIO Port T
};
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called. Any fancy
// actions (such as making decisions based on the reset cause register, and
// resetting the bits in that register) are left solely in the hands of the
// application.
//
//*****************************************************************************
void
ResetISR(void)
{
//
// Jump to the CCS C initialization routine. This will enable the
// floating-point unit as well, so that does not need to be done here.
//
__asm(" .global _c_int00\n"
" b.w _c_int00");
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
static void
NmiSR(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
static void
FaultISR(void)
{
//
// Enter an infinite loop.
//
while(1)
{
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives an unexpected
// interrupt. This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
static void
IntDefaultHandler(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}
examples/TM4C129/ccs/Mongoose_TM4C129_BM/target_config.ccxml 0 → 100644
View file @ fd763846
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="Stellaris In-Circuit Debug Interface_0">
<instance XML_version="1.2" desc="Stellaris In-Circuit Debug Interface_0" href="connections/Stellaris_ICDI_Connection.xml" id="Stellaris In-Circuit Debug Interface_0" xml="Stellaris_ICDI_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Stellaris In-Circuit Debug Interface_0">
<instance XML_version="1.2" href="drivers/stellaris_cs_dap.xml" id="drivers" xml="stellaris_cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/stellaris_cortex_m4.xml" id="drivers" xml="stellaris_cortex_m4.xml" xmlpath="drivers"/>
<platform XML_version="1.2" id="platform_0">
<instance XML_version="1.2" desc="Stellaris TM4C129ENCPDT_0" href="devices/tm4c129encpdt.xml" id="Stellaris TM4C129ENCPDT_0" xml="tm4c129encpdt.xml" xmlpath="devices"/>
</platform>
</connection>
</configuration>
</configurations>
examples/TM4C129/ccs/README.md 0 → 100644
View file @ fd763846
TI Tiva TM4C129 example
=======================
This directory contains a Mongoose example CCS project for Tiva TM4C129.
It targets the [Crypto Connected LaunchPad](http://www.ti.com/tool/ek-tm4c129exl) dev board.
You will need CCS 6+ with Tiva support and TivaWare SDK installed.
TivaWare should be installed under `${TI_PRODUCTS_DIR}/TivaWare_C_Series-2.1.3.156`,
which is usually `C:\TI\TivaWare_C_Series-2.1.3.156` on Windows.
If you have a different version installed, please edit the `SDK_ROOT` path
variable under `Project -> Properties -> Resource -> Linked Resources`.
mongoose.c
View file @ fd763846
......@@ -725,10 +725,9 @@ typedef int cs_dirent_dummy;
/*
* There is no sys/time.h on ARMCC.
*/
#if !(defined(__ARMCC_VERSION) || defined(__ICCARM__)) && \
(!defined(CS_PLATFORM) || \
(CS_PLATFORM != CS_P_CC3200 && CS_PLATFORM != CS_P_MSP432 && \
CS_PLATFORM != CS_P_NXP_LPC))
#if !(defined(__ARMCC_VERSION) || defined(__ICCARM__)) && \
!defined(__TI_COMPILER_VERSION__) && \
(!defined(CS_PLATFORM) || CS_PLATFORM != CS_P_NXP_LPC)
#include <sys/time.h>
#endif
#else
......
mongoose.h
View file @ fd763846
......@@ -48,6 +48,7 @@
#define CS_P_CC3200 4
#define CS_P_MSP432 5
#define CS_P_CC3100 6
#define CS_P_TM4C129 14
#define CS_P_MBED 7
#define CS_P_WINCE 8
#define CS_P_NXP_LPC 13
......@@ -55,6 +56,7 @@
#define CS_P_NRF51 12
#define CS_P_NRF52 10
#define CS_P_PIC32_HARMONY 11
/* Next id: 15 */
/* If not specified explicitly, we guess platform by defines. */
#ifndef CS_PLATFORM
......@@ -79,6 +81,9 @@
#define CS_PLATFORM CS_P_PIC32_HARMONY
#elif defined(ICACHE_FLASH)
#define CS_PLATFORM CS_P_ESP8266
#elif defined(TARGET_IS_TM4C129_RA0) || defined(TARGET_IS_TM4C129_RA1) || \
defined(TARGET_IS_TM4C129_RA2)
#define CS_PLATFORM CS_P_TM4C129
#endif
#ifndef CS_PLATFORM
......@@ -774,6 +779,66 @@ int _stat(const char *pathname, struct stat *st);
#endif /* CS_PLATFORM == CS_P_MSP432 */
#endif /* CS_COMMON_PLATFORMS_PLATFORM_MSP432_H_ */
#ifdef MG_MODULE_LINES
#line 1 "common/platforms/platform_tm4c129.h"
#endif
/*
* Copyright (c) 2014-2016 Cesanta Software Limited
* All rights reserved
*/
#ifndef CS_COMMON_PLATFORMS_PLATFORM_TM4C129_H_
#define CS_COMMON_PLATFORMS_PLATFORM_TM4C129_H_
#if CS_PLATFORM == CS_P_TM4C129
#include <assert.h>
#include <ctype.h>
#include <errno.h>
#include <inttypes.h>
#include <stdint.h>
#include <string.h>
#include <time.h>
#ifndef __TI_COMPILER_VERSION__
#include <fcntl.h>
#include <sys/time.h>
#endif
#define SIZE_T_FMT "u"
typedef struct stat cs_stat_t;
#define DIRSEP '/'
#define to64(x) strtoll(x, NULL, 10)
#define INT64_FMT PRId64
#define INT64_X_FMT PRIx64
#define __cdecl
#ifndef MG_NET_IF
# include <lwip/opt.h>
# if LWIP_SOCKET
# define MG_NET_IF MG_NET_IF_SOCKET
# else
# define MG_NET_IF MG_NET_IF_LWIP_LOW_LEVEL
# endif
# define MG_LWIP 1
#elif MG_NET_IF == MG_NET_IF_SIMPLELINK
# include "common/platforms/simplelink/cs_simplelink.h"
#endif
#ifndef CS_ENABLE_STDIO
#define CS_ENABLE_STDIO 1
#endif
#ifdef __TI_COMPILER_VERSION__
/* As of 5.2.8, TI compiler does not support va_copy() yet. */
#define va_copy(apc, ap) ((apc) = (ap))
#endif /* __TI_COMPILER_VERSION__ */
#ifdef __cplusplus
}
#endif
#endif /* CS_PLATFORM == CS_P_TM4C129 */
#endif /* CS_COMMON_PLATFORMS_PLATFORM_TM4C129_H_ */
#ifdef MG_MODULE_LINES
#line 1 "common/platforms/platform_mbed.h"
#endif
/*
......
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